12,056 research outputs found
A branch-and-bound methodology within algebraic modelling systems
Through the use of application-specific branch-and-bound directives it is possible to find solutions to combinatorial models that would otherwise be difficult or impossible to find by just using generic branch-and-bound techniques within the framework of mathematical programming. {\sc Minto} is an example of a system which offers the possibility to incorporate user-provided directives (written in {\sc C}) to guide the branch-and-bound search. Its main focus, however, remains on mathematical programming models. The aim of this paper is to present a branch-and-bound methodology for particular combinatorial structures to be embedded inside an algebraic modelling language. One advantage is the increased scope of application. Another advantage is that directives are more easily implemented at the modelling level than at the programming level
Processor Verification Using Efficient Reductions of the Logic of Uninterpreted Functions to Propositional Logic
The logic of equality with uninterpreted functions (EUF) provides a means of
abstracting the manipulation of data by a processor when verifying the
correctness of its control logic. By reducing formulas in this logic to
propositional formulas, we can apply Boolean methods such as Ordered Binary
Decision Diagrams (BDDs) and Boolean satisfiability checkers to perform the
verification.
We can exploit characteristics of the formulas describing the verification
conditions to greatly simplify the propositional formulas generated. In
particular, we exploit the property that many equations appear only in positive
form. We can therefore reduce the set of interpretations of the function
symbols that must be considered to prove that a formula is universally valid to
those that are ``maximally diverse.''
We present experimental results demonstrating the efficiency of this approach
when verifying pipelined processors using the method proposed by Burch and
Dill.Comment: 46 page
The effect of scale-free topology on the robustness and evolvability of genetic regulatory networks
We investigate how scale-free (SF) and Erdos-Renyi (ER) topologies affect the
interplay between evolvability and robustness of model gene regulatory networks
with Boolean threshold dynamics. In agreement with Oikonomou and Cluzel (2006)
we find that networks with SFin topologies, that is SF topology for incoming
nodes and ER topology for outgoing nodes, are significantly more evolvable
towards specific oscillatory targets than networks with ER topology for both
incoming and outgoing nodes. Similar results are found for networks with SFboth
and SFout topologies. The functionality of the SFout topology, which most
closely resembles the structure of biological gene networks (Babu et al.,
2004), is compared to the ER topology in further detail through an extension to
multiple target outputs, with either an oscillatory or a non-oscillatory
nature. For multiple oscillatory targets of the same length, the differences
between SFout and ER networks are enhanced, but for non-oscillatory targets
both types of networks show fairly similar evolvability. We find that SF
networks generate oscillations much more easily than ER networks do, and this
may explain why SF networks are more evolvable than ER networks are for
oscillatory phenotypes. In spite of their greater evolvability, we find that
networks with SFout topologies are also more robust to mutations than ER
networks. Furthermore, the SFout topologies are more robust to changes in
initial conditions (environmental robustness). For both topologies, we find
that once a population of networks has reached the target state, further
neutral evolution can lead to an increase in both the mutational robustness and
the environmental robustness to changes in initial conditions.Comment: 16 pages, 15 figure
Symbolic Implementation of Connectors in BIP
BIP is a component framework for constructing systems by superposing three
layers of modeling: Behavior, Interaction, and Priority. Behavior is
represented by labeled transition systems communicating through ports.
Interactions are sets of ports. A synchronization between components is
possible through the interactions specified by a set of connectors. When
several interactions are possible, priorities allow to restrict the
non-determinism by choosing an interaction, which is maximal according to some
given strict partial order.
The BIP component framework has been implemented in a language and a
tool-set. The execution of a BIP program is driven by a dedicated engine, which
has access to the set of connectors and priority model of the program. A key
performance issue is the computation of the set of possible interactions of the
BIP program from a given state.
Currently, the choice of the interaction to be executed involves a costly
exploration of enumerative representations for connectors. This leads to a
considerable overhead in execution times. In this paper, we propose a symbolic
implementation of the execution model of BIP, which drastically reduces this
overhead. The symbolic implementation is based on computing boolean
representation for components, connectors, and priorities with an existing BDD
package
Efficient enumeration of solutions produced by closure operations
In this paper we address the problem of generating all elements obtained by
the saturation of an initial set by some operations. More precisely, we prove
that we can generate the closure of a boolean relation (a set of boolean
vectors) by polymorphisms with a polynomial delay. Therefore we can compute
with polynomial delay the closure of a family of sets by any set of "set
operations": union, intersection, symmetric difference, subsets, supersets
). To do so, we study the problem: for a set
of operations , decide whether an element belongs to the closure
by of a family of elements. In the boolean case, we prove that
is in P for any set of boolean operations
. When the input vectors are over a domain larger than two
elements, we prove that the generic enumeration method fails, since
is NP-hard for some . We also study the
problem of generating minimal or maximal elements of closures and prove that
some of them are related to well known enumeration problems such as the
enumeration of the circuits of a matroid or the enumeration of maximal
independent sets of a hypergraph. This article improves on previous works of
the same authors.Comment: 30 pages, 1 figure. Long version of the article arXiv:1509.05623 of
the same name which appeared in STACS 2016. Final version for DMTCS journa
Finite Boolean Algebras for Solid Geometry using Julia's Sparse Arrays
The goal of this paper is to introduce a new method in computer-aided
geometry of solid modeling. We put forth a novel algebraic technique to
evaluate any variadic expression between polyhedral d-solids (d = 2, 3) with
regularized operators of union, intersection, and difference, i.e., any CSG
tree. The result is obtained in three steps: first, by computing an independent
set of generators for the d-space partition induced by the input; then, by
reducing the solid expression to an equivalent logical formula between Boolean
terms made by zeros and ones; and, finally, by evaluating this expression using
bitwise operators. This method is implemented in Julia using sparse arrays. The
computational evaluation of every possible solid expression, usually denoted as
CSG (Constructive Solid Geometry), is reduced to an equivalent logical
expression of a finite set algebra over the cells of a space partition, and
solved by native bitwise operators.Comment: revised version submitted to Computer-Aided Geometric Desig
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