Generalized surface codes and packing of logical qubits

We consider a notion of relative homology (and cohomology) for surfaces with two types of boundaries. Using this tool, we study a generalization of Kitaev's code based on surfaces with mixed boundaries. This construction includes both Bravyi and Kitaev's and Freedman and Meyer's extension of Kitaev's toric code. We argue that our generalization offers a denser storage of quantum information. In a planar architecture, we obtain a three-fold overhead reduction over the standard architecture consisting of a punctured square lattice

A linear-time benchmarking tool for generalized surface codes

Quantum information processors need to be protected against errors and faults. One of the most widely considered fault-tolerant architecture is based on surface codes. While the general principles of these codes are well understood and basic code properties such as minimum distance and rate are easy to characterize, a code's average performance depends on the detailed geometric layout of the qubits. To date, optimizing a surface code architecture and comparing different geometric layouts relies on costly numerical simulations. Here, we propose a benchmarking algorithm for simulating the performance of surface codes, and generalizations thereof, that runs in linear time. We implemented this algorithm in a software that generates performance reports and allows to quickly compare different architectures

Tailoring surface codes for highly biased noise

The surface code, with a simple modification, exhibits ultra-high error correction thresholds when the noise is biased towards dephasing. Here, we identify features of the surface code responsible for these ultra-high thresholds. We provide strong evidence that the threshold error rate of the surface code tracks the hashing bound exactly for all biases, and show how to exploit these features to achieve significant improvement in logical failure rate. First, we consider the infinite bias limit, meaning pure dephasing. We prove that the error threshold of the modified surface code for pure dephasing noise is $50\%$, i.e., that all qubits are fully dephased, and this threshold can be achieved by a polynomial time decoding algorithm. We demonstrate that the sub-threshold behavior of the code depends critically on the precise shape and boundary conditions of the code. That is, for rectangular surface codes with standard rough/smooth open boundaries, it is controlled by the parameter $g=\gcd(j,k)$, where $j$ and $k$ are dimensions of the surface code lattice. We demonstrate a significant improvement in logical failure rate with pure dephasing for co-prime codes that have $g=1$, and closely-related rotated codes, which have a modified boundary. The effect is dramatic: the same logical failure rate achievable with a square surface code and $n$ physical qubits can be obtained with a co-prime or rotated surface code using only $O(\sqrt{n})$ physical qubits. Finally, we use approximate maximum likelihood decoding to demonstrate that this improvement persists for a general Pauli noise biased towards dephasing. In particular, comparing with a square surface code, we observe a significant improvement in logical failure rate against biased noise using a rotated surface code with approximately half the number of physical qubits.Comment: 18+4 pages, 24 figures; v2 includes additional coauthor (ASD) and new results on the performance of surface codes in the finite-bias regime, obtained with beveled surface codes and an improved tensor network decoder; v3 published versio

Combining Topological Hardware and Topological Software: Color Code Quantum Computing with Topological Superconductor Networks

We present a scalable architecture for fault-tolerant topological quantum computation using networks of voltage-controlled Majorana Cooper pair boxes, and topological color codes for error correction. Color codes have a set of transversal gates which coincides with the set of topologically protected gates in Majorana-based systems, namely the Clifford gates. In this way, we establish color codes as providing a natural setting in which advantages offered by topological hardware can be combined with those arising from topological error-correcting software for full-fledged fault-tolerant quantum computing. We provide a complete description of our architecture including the underlying physical ingredients. We start by showing that in topological superconductor networks, hexagonal cells can be employed to serve as physical qubits for universal quantum computation, and present protocols for realizing topologically protected Clifford gates. These hexagonal cell qubits allow for a direct implementation of open-boundary color codes with ancilla-free syndrome readout and logical $T$-gates via magic state distillation. For concreteness, we describe how the necessary operations can be implemented using networks of Majorana Cooper pair boxes, and give a feasibility estimate for error correction in this architecture. Our approach is motivated by nanowire-based networks of topological superconductors, but could also be realized in alternative settings such as quantum Hall-superconductor hybrids.Comment: 24 pages, 24 figure