Multilevel Converters: An Enabling Technology for High-Power Applications

| Multilevel converters are considered today as the state-of-the-art power-conversion systems for high-power and power-quality demanding applications. This paper presents a tutorial on this technology, covering the operating principle and the different power circuit topologies, modulation methods, technical issues and industry applications. Special attention is given to established technology already found in industry with more in-depth and self-contained information, while recent advances and state-of-the-art contributions are addressed with useful references. This paper serves as an introduction to the subject for the not-familiarized reader, as well as an update or reference for academics and practicing engineers working in the field of industrial and power electronics.Ministerio de Ciencia y Tecnología DPI2001-3089Ministerio de Eduación y Ciencia d TEC2006-0386

The Age of Multilevel Converters Arrives

This work is devoted to review and analyze the most relevant characteristics of multilevel converters, to motivate possible solutions, and to show that we are in a decisive instant in which energy companies have to bet on these converters as a good solution compared with classic two-level converters. This article presents a brief overview of the actual applications of multilevel converters and provides an introduction of the modeling techniques and the most common modulation strategies. It also addresses the operational and technological issues

Investigation of FACTS devices to improve power quality in distribution networks

Flexible AC transmission system (FACTS) technologies are power electronic solutions that improve power transmission through enhanced power transfer volume and stability, and resolve quality and reliability issues in distribution networks carrying sensitive equipment and non-linear loads. The use of FACTS in distribution systems is still in its infancy. Voltages and power ratings in distribution networks are at a level where realistic FACTS devices can be deployed. Efficient power converters and therefore loss minimisation are crucial prerequisites for deployment of FACTS devices. This thesis investigates high power semiconductor device losses in detail. Analytical closed form equations are developed for conduction loss in power devices as a function of device ratings and operating conditions. These formulae have been shown to predict losses very accurately, in line with manufacturer data. The developed formulae enable circuit designers to quickly estimate circuit losses and determine the sensitivity of those losses to device voltage and current ratings, and thus select the optimal semiconductor device for a specific application. It is shown that in the case of majority carrier devices (such as power MOSFETs), the conduction power loss (at rated current) increases linearly in relation to the varying rated current (at constant blocking voltage), but is a square root of the variable blocking voltage when rated current is fixed. For minority carrier devices (such as a pin diode or IGBT), a similar relationship is observed for varying current, however where the blocking voltage is altered, power losses are derived as a square root with an offset (from the origin). Finally, this thesis conducts a power loss-oriented evaluation of cascade type multilevel converters suited to reactive power compensation in 11kV and 33kV systems. The cascade cell converter is constructed from a series arrangement of cell modules. Two prospective structures of cascade type converters were compared as a case study: the traditional type which uses equal-sized cells in its chain, and a second with a ternary relationship between its dc-link voltages. Modelling (at 81 and 27 levels) was carried out under steady state conditions, with simplified models based on the switching function and using standard circuit simulators. A detailed survey of non punch through (NPT) and punch through (PT) IGBTs was completed for the purpose of designing the two cascaded converters. Results show that conduction losses are dominant in both types of converters in NPT and PT IGBTs for 11kV and 33kV systems. The equal-sized converter is only likely to be useful in one case (27-levels in the 33kV system). The ternary-sequence converter produces lower losses in all other cases, and this is especially noticeable for the 81-level converter operating in an 11kV network

Minimization of power loss in newfangled cascaded H-bridge multilevel inverter using in-phase disposition PWM and wavelet transform based fault diagnosis

AbstractNowadays multilevel inverters (MLIs) have been preferred over conventional two-level inverters due to reduced harmonic distortions, lower electromagnetic interference, and higher DC link voltages. However, the increased number of components, complex PWM control, voltage-balancing problem, and component failure in the circuit are some of the disadvantages. The topology suggested in this paper provides a DC voltage in the shape of a staircase that approximates the rectified shape of a commanded sinusoidal wave to the bridge inverter, which in turn alternates the polarity to produce an AC voltage with low total harmonic distortion and power loss. This topology requires fewer components and hence it leads to the reduction of overall cost and complexity particularly for higher output voltage levels. The component fault diagnostic algorithm is developed using wavelets transform tool. Finally an experimental prototype is developed and validated with the simulation results

Investigations of New Fault-Tolerant Methods for Multilevel Inverters

The demands of power electronics with high power capability have increased in the last decades. These needs have driven the expansion of existing power electronics topologies and developing new power electronics generations. Multilevel inverters (MLI) are one of the most promising power electronics circuits that have been implemented and commercialized in high-voltage direct current (HVDC), motor drives, and battery energy storage systems (BESS). The expanding uses of the MLI have lead to creation of new topologies for different applications. However, one of the disadvantages of using MLIs is their complexity. MLIs consist of a large number of switching devices, which can result in a reduction of system reliability. There are significant challenges to the design of a reliable system that has the MLI’s capability with integrated fault-tolerance. In other words, design a system that can handle the fault, totally or partially, while maintaining high power capabilities and efficiency. This aim of this dissertation is to investigate the fault-tolerance of MLIs from two different points of view: 1- Develop new solutions for existing MLI topologies. In other words, add some features to existing MLIs to improve their reliability when a fault occurs. 2- Design new MLIs that have a fault-tolerant capability. A new open-circuit fault detection is proposed in this dissertation. The new fault detection method is based on monitoring the output voltage of each cell and leg voltage polarity along with each switch state. By monitoring each cell output voltage and leg voltage, the faulty cell can be detected and isolated. A novel circuit to maintain system operation under the condition of one (or more) components suffering from a faulted condition is also proposed in this dissertation. This results in a topology that continues to operate at full capability. Additionally, a new topology is proposed that offers reducing the number of batteries by 50%. Also, it has the ability to operate under non-unity power factor, which enables it to be suitable for battery energy storage systems, and static compensator (STATCOM) applications. Another novel hybrid cascaded H-bridge (CHB), known as the X-CHB, for a fault-tolerant operation is proposed in this dissertation. It ensures seamless operation of the system under an open/short circuit switching fault or dc supply fault

Distributed control of a fault tolerant modular multilevel inverter for direct-drive wind turbine grid interfacing

Modular generator and converter topologies are being pursued for large offshore wind turbines to achieve fault tolerance and high reliability. A centralized controller presents a single critical point of failure which has prevented a truly modular and fault tolerant system from being obtained. This study analyses the inverter circuit control requirements during normal operation and grid fault ride-through, and proposes a distributed controller design to allow inverter modules to operate independently of each other. All the modules independently estimate the grid voltage magnitude and position, and the modules are synchronised together over a CAN bus. The CAN bus is also used to interleave the PWM switching of the modules and synchronise the ADC sampling. The controller structure and algorithms are tested by laboratory experiments with respect to normal operation, initial synchronization to the grid, module fault tolerance and grid fault ride-through

Capacitor Voltage Balancing of a Grid-Tied, Cascaded Multilevel Converter with Binary Asymmetric Voltage Levels Using an Optimal One-Step-Ahead Switching-State Combination Approach†

This paper presents a novel capacitor voltage balancing control approach for cascaded multilevel inverters with an arbitrary number of series-connected H-Bridge modules (floating capacitor modules) with asymmetric voltages, tiered by a factor of two (binary asymmetric). Using a nearest-level reference waveform, the balancing approach uses a one-step-ahead approach to find the optimal switching-state combination among all redundant switching-state combinations to balance the capacitor voltages as quickly as possible. Moreover, using a Lyapunov function candidate and considering LaSalle\u27s invariance principle, it is shown that an offline calculated trajectory of optimal switching-state combinations for each discrete output voltage level can be used to operate (asymptotically stable) the inverter without measuring any of the capacitor voltages, achieving a novel sensorless control as well. To verify the stability of the one-step-ahead balancing approach and its sensorless variant, a demonstrator inverter with 33 levels is operated in grid-tied mode. For the chosen 33-level converter, the NPC main-stage and the individual H-bridge modules are operated with an individual switching frequency of about 1 kHz and 2 kHz, respectively. The sensorless approach slightly reduced the dynamic system response and, furthermore, the current THD for the chosen operating point was increased from 3.28% to 4.58% in comparison with that of using the capacitor voltage feedback