214 research outputs found

    Low power predictable memory and processing architectures

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    Great demand in power optimized devices shows promising economic potential and draws lots of attention in industry and research area. Due to the continuously shrinking CMOS process, not only dynamic power but also static power has emerged as a big concern in power reduction. Other than power optimization, average-case power estimation is quite significant for power budget allocation but also challenging in terms of time and effort. In this thesis, we will introduce a methodology to support modular quantitative analysis in order to estimate average power of circuits, on the basis of two concepts named Random Bag Preserving and Linear Compositionality. It can shorten simulation time and sustain high accuracy, resulting in increasing the feasibility of power estimation of big systems. For power saving, firstly, we take advantages of the low power characteristic of adiabatic logic and asynchronous logic to achieve ultra-low dynamic and static power. We will propose two memory cells, which could run in adiabatic and non-adiabatic mode. About 90% dynamic power can be saved in adiabatic mode when compared to other up-to-date designs. About 90% leakage power is saved. Secondly, a novel logic, named Asynchronous Charge Sharing Logic (ACSL), will be introduced. The realization of completion detection is simplified considerably. Not just the power reduction improvement, ACSL brings another promising feature in average power estimation called data-independency where this characteristic would make power estimation effortless and be meaningful for modular quantitative average case analysis. Finally, a new asynchronous Arithmetic Logic Unit (ALU) with a ripple carry adder implemented using the logically reversible/bidirectional characteristic exhibiting ultra-low power dissipation with sub-threshold region operating point will be presented. The proposed adder is able to operate multi-functionally

    A Study on Energy-Efficient Inductor Current Controls for Maximum Energy Delivery in Battery-free Buck Converter

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    학위논문 (박사)-- 서울대학교 대학원 : 전기·컴퓨터공학부, 2017. 2. 김재하.A discontinuous conduction mode (DCM) buck converter, which acts as a voltage regulator in battery-free applications, is proposed to maximize the ener-gy delivery to the load system. In this work, we focus the energy loss problem during start-up and steady-state operation of the buck converter, which severely limits the energy delivery. Especially, the energy loss problem arises from the fact that there is no constant power source such as a battery and the only a small amount of energy harvested from the ambient energy sources is available. To address such energy loss problem, this dissertation proposes optimal induc-tor current control techniques at each operation to greatly reduce the energy losses. First, a switching-based stepwise capacitor charging scheme is presented that can charge the output capacitor with constant inductor current during start-up operation. By switching the inductor with gradually incrementing duty-cycle ratios in a stepwise fashion, the buck converter can make the inductor current a constant current source, which can greatly reduce the start-up energy loss com-pared to that in the conventional capacitor charging scheme with a voltage source. Second, a variable on-time (VOT) pulse-frequency-modulation (PFM) scheme is presented that can keep the peak inductor current constant during steady-state operation. By adaptively varying the on-time according to the op-erating voltage conditions of the buck converter, it can suppress the voltage ripple and improve the power efficiency even with a small output capacitor. Third, an adaptive off-time positioning zero-crossing detector (AOP-ZCD) is presented that can adaptively position the turn-off timing of the low-side switch close to the zero-inductor-current timing by predicting the inductor current waveform without using a power-hungry continuous-time ZCD. To demonstrate the proposed design concepts, the prototype battery-free wireless remote switch including the piezoelectric energy harvester and the proposed buck converter was fabricated in a 250 nm high-voltage CMOS technology. It can harvest a total energy of 246 μJ from a single button press action of a 300-mm2 lead magnesium niobate-lead titanate (PMN-PT) piezoelectric disc, and deliver more than 200 μJ to the load, which is sufficient to transmit a 4-byte-long message via 2.4-GHz wireless USB channel over a 10-m distance. If such battery-free application does not use the proposed buck converter, the energy losses in-curred at the buck converter would be larger than the energy harvested, and therefore it cannot operate with a single button-pressing action. Furthermore, thanks to the proposed energy efficient buck converter, the battery-free wire-less remote switch can be realized by using a cheaper PZT piezoelectric source, which can achieve a 10× cost reduction.CHAPTER 1 INTRODUCTION 1 1.1 MOTIVATION 1 1.2 THESIS CONTRIBUTION AND ORGANIZATION 6 CHAPTER 2 OPERATION MODE AND OVERALL ARCHITECTURE 8 2.1 TOPOLOGY SELECTION 8 2.2 PRINCIPLE OF OPERATION 11 2.2.1 BASIC OPERATION IN CCM 12 2.2.2 BASIC OPERATION IN DCM 15 2.3 OPERATION MODE 17 2.4 OVERALL ARCHITECTURE 19 CHAPTER 3 OPTIMAL INDUCTOR CURRENT CONTROLS FOR MAXIMUM ENERGY DELIVERY 23 3.1 CONSTANT INDUCTOR CURRENT CONTROL WITH SWITCHING-BASED STEPWISE CAPACITOR CHARGING SCHEME 24 3.1.1 CONVENTIONAL CHARGING SCHEME WITH A SWITCH 24 3.1.2 ADIABATIC STEPWISE CHARGING 27 3.1.3 PROPOSED START-UP SCHEME 29 3.2 CONSTANT INDUCTOR PEAK CURRENT CONTROL WITH VARIABLE ON-TIME PFM SCHEME 35 3.2.1 BASIC OPERATION OF PFM BUCK CONVERTER 35 3.2.2 CONSTANT ON-TIME PFM SCHEME 39 3.2.3 VARIABLE ON-TIME PFM SCHEME 41 3.3 INDUCTOR CURRENT PREDICTION WITH ADAP-TIVE OFF-TIME POSITIONING ZCD (AOP-ZCD) 44 3.3.1 PREVIOUS SAMPLING-BASED ZCD 44 3.3.2 PROPOSED ADAPTIVE OFF-TIME POSITIONING ZCD 47 CHAPTER 4 CIRCUIT IMPLEMENTATION 49 4.1 CIRCUIT IMPLEMENTATION OF SWITCHING-BASED STEPWISE CAPACITOR CHARGER 49 4.1.1 VOLTAGE DETECTOR (VD) 50 4.1.2 DIGITAL PULSE WIDTH MODULATOR (DPWM) 52 4.1.3 PROGRAMMABLE DUTY-CYCLE CONTROLLER (DCC) 55 4.1.4 SWITCHED CAPACITOR (SC) STEP-DOWN CONVERTER 57 4.2 CIRCUIT IMPLEMENTATION OF VARIABLE ON-TIME PULSE GENERATOR 59 4.3 CIRCUIT IMPLEMENTATION OF ADAPTIVE OFF-TIME POSITIONING ZCD 64 4.3.1 ADAPTIVE OFF-TIME (AOT) PULSE GENERATOR 64 4.3.2 TIMING ERROR DETECTOR AND SHIFT-REGISTER 68 CHAPTER 5 MEASUREMENT RESULTS OF PROPOSED BUCK CONVERTER 70 5.1 SWITCHING-BASED STEPWISE CAPACITOR CHARGER 71 5.2 STEADY-STATE PERFORMANCE WITH VOT PULSE GENERATOR AND AOP-ZCD 74 CHAPTER 6 REALIZATION OF BATTERY-FREE WIRELESS REMOTE SWITCH 84 6.1 KEY BUILDING BLOCKS OF BATTERY-FREE WIRELESS REMOTE SWITCH 85 6.2 PIEZOELECTRIC ENERGY HARVESTER WITH P-SSHI RECTIFIER 86 6.2.1 ANALYSIS ON SINGLE-PULSED ENERGY HARVESTING 88 6.2.2 PROPOSED PIEZOELECTRIC ENERGY HARVESTER 91 6.2.3 CIRCUIT IMPLEMENTATION 93 6.3 MEASUREMENT RESULTS OF BATTERY-FREE WIRELESS SWITCH 96 CHAPTER 7 CONCLUSION 101 BIBLIOGRAPHY 103 초 록 110Docto

    Asymptotically Zero Energy Computing Using Split-Level Charge Recovery Logic

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    The dynamic power requirement of CMOS circuits is rapidly becoming a major concern in the design of personal information systems and large computers. In this work we present a number of new CMOS logic families, Charge Recovery Logic (CRL) as well as the much improved Split-Level Charge Recovery Logic (SCRL), within which the transfer of charge between the nodes occurs quasistatically. Operating quasistatically, these logic families have an energy dissipation that drops linearly with operating frequency, i.e., their power consumption drops quadratically with operating frequency as opposed to the linear drop of conventional CMOS. The circuit techniques in these new families rely on constructing an explicitly reversible pipelined logic gate, where the information necessary to recover the energy used to compute a value is provided by computing its logical inverse. Information necessary to uncompute the inverse is available from the subsequent inverse logic stage. We demonstrate the low energy operation of SCRL by presenting the results from the testing of the first fully quasistatic 8 x 8 multiplier chip (SCRL-1) employing SCRL circuit techniques

    Wind Power

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    This book is the result of inspirations and contributions from many researchers of different fields. A wide verity of research results are merged together to make this book useful for students and researchers who will take contribution for further development of the existing technology. I hope you will enjoy the book, so that my effort to bringing it together for you will be successful. In my capacity, as the Editor of this book, I would like to thanks and appreciate the chapter authors, who ensured the quality of the material as well as submitting their best works. Most of the results presented in to the book have already been published on international journals and appreciated in many international conferences

    Bibliography of Lewis Research Center technical publications announced in 1985

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    This compilation of abstracts describes and indexes the technical reporting that resulted from the scientific and engineering work performed and managed by the Lewis Research Center in 1985. All the publications were announced in the 1985 issues of STAR (Scientific and Technical Aerospace Reports) and/or IAA (International Aerospace Abstracts). Included are research reports, journal articles, conference presentations, patents and patent applications, and theses

    Ferroelectrics

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    Ferroelectric materials exhibit a wide spectrum of functional properties, including switchable polarization, piezoelectricity, high non-linear optical activity, pyroelectricity, and non-linear dielectric behaviour. These properties are crucial for application in electronic devices such as sensors, microactuators, infrared detectors, microwave phase filters and, non-volatile memories. This unique combination of properties of ferroelectric materials has attracted researchers and engineers for a long time. This book reviews a wide range of diverse topics related to the phenomenon of ferroelectricity (in the bulk as well as thin film form) and provides a forum for scientists, engineers, and students working in this field. The present book containing 24 chapters is a result of contributions of experts from international scientific community working in different aspects of ferroelectricity related to experimental and theoretical work aimed at the understanding of ferroelectricity and their utilization in devices. It provides an up-to-date insightful coverage to the recent advances in the synthesis, characterization, functional properties and potential device applications in specialized areas

    Quantum Transport in Mesoscopic Systems

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    Mesoscopic physics deals with systems larger than single atoms but small enough to retain their quantum properties. The possibility to create and manipulate conductors of the nanometer scale has given birth to a set of phenomena that have revolutionized physics: quantum Hall effects, persistent currents, weak localization, Coulomb blockade, etc. This Special Issue tackles the latest developments in the field. Contributors discuss time-dependent transport, quantum pumping, nanoscale heat engines and motors, molecular junctions, electron–electron correlations in confined systems, quantum thermo-electrics and current fluctuations. The works included herein represent an up-to-date account of exciting research with a broad impact in both fundamental and applied topics

    Battery Systems and Energy Storage beyond 2020

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    Currently, the transition from using the combustion engine to electrified vehicles is a matter of time and drives the demand for compact, high-energy-density rechargeable lithium ion batteries as well as for large stationary batteries to buffer solar and wind energy. The future challenges, e.g., the decarbonization of the CO2-intensive transportation sector, will push the need for such batteries even more. The cost of lithium ion batteries has become competitive in the last few years, and lithium ion batteries are expected to dominate the battery market in the next decade. However, despite remarkable progress, there is still a strong need for improvements in the performance of lithium ion batteries. Further improvements are not only expected in the field of electrochemistry but can also be readily achieved by improved manufacturing methods, diagnostic algorithms, lifetime prediction methods, the implementation of artificial intelligence, and digital twins. Therefore, this Special Issue addresses the progress in battery and energy storage development by covering areas that have been less focused on, such as digitalization, advanced cell production, modeling, and prediction aspects in concordance with progress in new materials and pack design solutions

    Fourth SIAM Conference on Applications of Dynamical Systems

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    Fault-tolerant superconducting qubits

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    For quantum computing to become viable, the inherently fallible nature of qubits must be overcome with quantum error correction (QEC). QEC requires coherent qubits, in a configuration compatible with a given QEC scheme, and quantum logic operations with sufficiently low error. In this thesis, we perform a series of targeted experiments to achieve these goals on a path toward realizing the surface code QEC scheme. We first develop the Xmon variant of the transmon qubit, a highly coherent, planar, and frequency tunable superconducting qubit. With coherence demonstrated, we build an array of five Xmon qubits in a configuration compatible with the surface code, and demonstrate quantum logic operations with sufficiently low error to employ the surface code. These logic gates are characterized with randomized benchmarking, a protocol for determining gate error. We find applications of randomized benchmarking beyond the intended use in gate optimization and decoherence characterization, in addition to exploring the fundamental assumptions of randomized benchmarking. Lastly, we build a nine qubit Xmon transmon array and demonstrate correction of environmental bit-flip errors in a precursor to the surface code
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