26 research outputs found

    The RIT IEEE-488 buffer design

    Get PDF
    This document describes the design of an NMOS ASIC used to control an RIT IEEE-488 Buffer previously designed by the author. Past designs used discrete components to implement an asynchronous controller and a synchronous, one-hot controller. The present design utilizes a multiple controller architecture incorporated within the ASIC. The ASIC is used to control bus protocol, bus transceivers, and memory. At power-up, the buffer configures itself as an active listener on the bus and waits for a talker to initiate communication. The buffer accepts a data file (a plot file for example) from the talker, then takes control of the bus, addresses a listener, transfers the stored data to the listener, unaddresses the listener, releases the bus, and finally, reassumes the active listener configuration. The RIT IEEE-488 buffer can realize time savings for a user in a controllerless system. The buffer accepts data from a talker in a matter of seconds and then takes on the chore of driving a slow listener. Thus, the talker is returned quickly to the operator for further use. At present, the buffer isn\u27t queueable - it cannot accept another data file until it completes the transfer of the present file. The author has also added five nmos cells (schematic/layout) into the \u27/user/pub\u27 directory on the Apollo workstations in the Computer Engineering Department\u27s VLSI LAB at RIT. Cell names are VSCLK, SYNC, CLOCK_GEN_STACK, PAD_TRISTATE, and PAD_TRISTATE_BUFFERED. All five cells have been simulated and successfully run through DRC, ERC, and LVS checks

    Maze Mouse

    Get PDF
    This report is intended to provide an insight view of the Maze Mouse project. The first chapter serves astheintroduction to theproject, which covers the background of study, problem statement, and objectives and scope of study. The objective of this project is to produce a prototype of a mouse that can find itsown way out of a maze smoothly, butnot necessarily very quickly. This will be explained later in the report. This project requires strong basics in electronics, covering three important aspects of the mouse which are microcontroller, infrared sensor and stepper motor. The earlier partof the second chapter describes the details of the Sterling Mouse, an example of a mazemouse. The Sterling Mouse was created by Nick Smith as a participant in the Micromouse Competition held in the United States. The third chapter of this report presents the methodology used in completing thisMaze Mouse project. This includes the purchasing and procurement of the components, circuit construction, programming and integration of the mouse's separate circuits. In the next chapter, you will be provided with the details of the project work, which focuses on howthe prototype gets to work

    Fast short-circuit protection for SiC MOSFETs in extreme short-circuit conditions by integrated functions in CMOS-ASIC technology

    Get PDF
    Wide bandgap power transistors such as SiC MOSFETs and HEMTs GaN push furthermore the classical compromises in power electronics. Briefly, significant gains have been demonstrated: better efficiency, coupled with an increase in power densities offered by the increase in switching frequency. HV SiC MOSFETs have specific features such as a low short-circuit SC withstand time capability compared to Si IGBTs and thinner gate oxide, and a high gate-to-source switching control voltage. The negative bias on the gate at the off-state creates additional stress which reduces the reliability of the SiC MOSFET. The high positive bias on the gate causes a large drain saturation current in the event of a SC. Thus, this technology gives rise to specific needs for ultrafast monitoring and protection. For this reason, the work of this thesis focuses on two studies to overcome these constraints, with the objective of reaching a good performance compromise between ā€œCMS/ASIC-CMOS technological integration level-speedā€“robustnessā€. The first one, gathers a set of new solutions allowing a detection of the SC on the switching cycle, based on a conventional switch control architecture with two voltage levels. The second study is more exploratory and is based on a new gate-driver architecture, called multi-level, with low stress level for the SiC MOSFET while maintaining dynamic performances. The manuscript covers firstly the SiC MOSFET environment, (characterization and properties of SC behavior by simulation using PLECS and LTSpice software) and covers secondly a bibliographical study on the Gate drivers. And last, an in-depth study was carried out on SC type I & II (hard switch fault) (Fault under Load) and their respective detection circuits. A test bench, previously carried out in the laboratory, was used to complete and validate the analysis-simulation study and to prepare test stimuli for the design stage of new solutions. Inspired by the Gate charge method that appeared for Si IGBTs and evoked for SiC MOSFETs, this method has therefore been the subject of design, dimensioning and prototyping work, as a reference. This reference allows an HSF type detection in less than 200ns under 400V with 1.2kV components ranging from 80 to 120mOhm. Regarding new rapid and integrated detection methods, the work of this thesis focuses particularly on the design of a CMOS ASIC circuit. For this, the design of an adapted gate driver is essential. An ASIC is designed in X-Fab XT-0.18 SOICMOS technology under Cadence, and then packaged and assembled on a PCB. The PCB is designed for test needs and adaptable to the main bench. The design of the gate driver considered many functions (SC detection, SSD, segmented buffer, an "AMC", ...). From the SC detection point of view, the new integrated monitoring functions concern the VGS time derivative method which is based on a detection by an RC analog shunt circuit on the plateau sequence with two approaches: the first approach is based on a dip detection, i.e. the presence or not of the Miller plateau. The second approach is based on slope detection, i.e. the variability of the input capacitance of the power transistor under SC-HSF compared to normal operation. These methods are compared in the third chapter of the thesis, and demonstrate fault detection times between 40ns and 80ns, and preliminary robustness studies and critical cases are presented. A second new method is partially integrated in the ASIC, was designed. This method is not developed in the manuscript for valorization purposes. In addition to the main study, an exploratory study has focused on a modular architecture for close control at several bias voltage levels taking advantage of SOI isolation and low voltage CMOS transistors to drive SiC MOSFETs and improve their reliability through active and dynamic multi-level selection of switching sequences and on/off states

    240VAC TO llOVAC VOLTAGE CONVERTER

    Get PDF
    The main task of this final year project is to design a household 240VAC to 110VAC voltage converter. This converter should be able to supply up to 400 Watts ofpower, enough to power up a normal household appliances such as vacuum cleaner. A voltage regulator must be included in the design to ensure the protection of any household appliances that uses this converter. This is important to ensure user safety when operating this converter and to protect the equipments that use this converter. The idea of designing this particular converter is by combining an AC-to-DC converter with a DC-to-AC inverter. Thus, the design must be reliable andefficient in term ofpower conversion. The cost ofthe design should be minimized since this type of converter is available in the market but the price is quite expensive. The main concern in this design is to minimize the cost needed to build this converter while maintaining its performance

    Gate driver with 10 / 15ns in-transition variable drive current and 60% reduced current dip

    No full text
    The power supply is one of the major challenges for applications like internet of things IoTs and smart home. The maintenance issue of batteries and the limited power level of energy harvesting is addressed by the integrated micro power supply presented in this paper. Connected to the 120/230 Vrms mains, which is one of the most reliable energy sources and anywhere indoor available, it provides a 3.3V DC output voltage. The micro power supply consists of a fully integrated ACDC and DCDC converter with one external low voltage SMD buffer capacitor. The micro power supply is fabricated in a low cost 0.35 Ī¼m 700 V CMOS technology and covers a die size of 7.7 mmĀ². The use of only one external low voltage SMD capacitor, results in an extremely compact form factor. The ACDC is a direct coupled, full wave rectifier with a subsequent bipolar shunt regulator, which provides an output voltage around 17 V. The DCDC stage is a fully integrated 4:1 SC DCDC converter with an input voltage as high as 17 V and a peak efficiency of 45 %. The power supply achieves an overall output power of 3 mW, resulting in a power density of 390 Ī¼W/mmĀ². This exceeds prior art by a factor of 11

    Design of LCOS microdisplay backplanes for projection applications

    Get PDF
    De evolutie van licht emitterende diodes (LED) heeft ervoor gezorgd dat het op dit moment interessant wordt om deze componenten als lichtbron te gebruiken in projectiesystemen. LEDā€™s hebben belangrijke voordelen vergeleken met klassieke booglampen. Ze zijn compact, ze hebben een veel grotere levensduur en ogenblikkelijke schakeltijden, ze werken op lage spanningen, etc. LEDā€™s zijn smalbandig en kunnen een groterekleurenbereik realiseren. Ze hebben momenteel echter een beperkte helderheid. Naast de lichtbron is het type van de lichtklep ook bepalend voor de kwaliteit van een projectiesysteem. Er bestaan verschillende lichtkleptechnologieĆ«n waaronder die van de reflectieve LCOS-panelen. Deze lichtkleppen kunnen zeer hoge resoluties hebben en wordenvaak gebruikt in kwalitatieve, professionele projectiesystemen. LEDā€™s zijn echter totaal verschillend van booglampen. Ze hebben een andere vorm, package, stralingspatroon, aansturing, fysische en thermische eigenschappen, etc. Hoewel er een twintigtal optische architecturen bekend zijn voor reflectieve beeldschermen (met een booglamp als lichtbron), zijn ze niet geschikt voor LED-projectoren en moeten nieuwe optische architecturen en een elektronische aansturing ontwikkeld worden. In dit doctoraat werd er hieromtrent onderzoek gedaan. Er werd uiteindelijk een driekleurenprojector (R, G, B) met een efficiĆ«nt LED-belichtingssysteem gebouwd met twee LCOS-lichtkleppen. Deze LEDprojector heeft superieure eigenschappen (zeer lange levensduur, beeldkwaliteit, etc.) en een matige lichtopbrengst

    High-Efficiency Three-Phase Current Source Rectifier Using SiC Devices and Delta-Type Topology

    Get PDF
    In this dissertation, the benefits of the three-phase current source rectifier (CSR) in high power rectifier, data center power supply and dc fast charger for electric vehicles (EV) will be evaluated, and new techniques will be proposed to increase the power efficiency of CSRs. A new topology, referred as Delta-type Current Source Rectifier (DCSR), is proposed and implemented to reduce the conduction loss by up to 20%. By connecting the three legs in a delta type on ac input side, the dc-link current in DCSR can be shared by two legs at the same time. To increase the switching speed and power density, all-SiC power modules are built and implemented for CSRs. The switching waveforms in the commutation are measured and studied based on double pulse test. Four different modulation schemes are compared for high efficiency CSR considering the switching characteristics of different device combinations. The most advantageous modulation scheme is then identified for each of the device combinations investigated. A compensation method is proposed to reduce the input current distortion caused by overlap time and slow transition in CSRs. The proposed method first minimizes the overlap time and then compensates the charge gain/loss according to the sampled voltage and current. It is verified that the proposed method can reduce the input current distortion especially when the line-to-line voltage is close to zero. The dc-link current will become discontinuous under light load in CSRs, when the traditional control algorithm may not work consistently well. To operate CSR in discontinuous current mode (DCM), the CSR is modeled in DCM and a new control algorithm with feedforward compensation is proposed and verified through experiments. A protection scheme with fast response time is proposed, analyzed and verified to protect SiC devices from overvoltage caused by current interruption in CSRs. To deal with the harmonics and voltage sag in the input ac voltage, a new control algorithm is proposed. By adding ac current feedback control and proportional-resonant (PR) control, the proposed control algorithm can reduce the input current distortion and dc output voltage ripple under input voltage disturbance

    Practical free-space quantum key distribution

    Get PDF
    Within the last two decades, the world has seen an exponential increase in the quantity of data traffic exchanged electronically. Currently, the widespread use of classical encryption technology provides tolerable levels of security for data in day to day life. However, with one somewhat impractical exception these technologies are based on mathematical complexity and have never been proven to be secure. Significant advances in mathematics or new computer architectures could render these technologies obsolete in a very short timescale. By contrast, Quantum Key Distribution (or Quantum Cryptography as it is sometimes called) offers a theoretically secure method of cryptographic key generation and exchange which is guaranteed by physical laws. Moreover, the technique is capable of eavesdropper detection during the key exchange process. Much research and development work has been undertaken but most of this work has concentrated on the use of optical fibres as the transmission medium for the quantum channel. This thesis discusses the requirements, theoretical basis and practical development of a compact, free-space transmission quantum key distribution system from inception to system tests. Experiments conducted over several distances are outlined which verify the feasibility of quantum key distribution operating continuously over ranges from metres to intercity distances and finally to global reach via the use of satellites

    Dual-pulse laser induced breakdown spectroscopy in the vacuum ultraviolet with ambient gas: spectroscopic analysis and optimization of limit of detection of carbon and sulfur in steel

    Get PDF
    Laser Induced Breakdown Spectroscopy (LIBS) in the vacuum ultraviolet (VUV) spectral region was applied to standard steel samples in dual-pulse excitation mode with an ambient gas. Two lasers were employed in collinear geometry, one as an ablation laser (Spectron: 200mJ/15ns) and the other a reheating laser (Surelite: 665mJ/6ns). A dual-pulse scheme was applied to the traditional single-pulse LIBS and led to a significant enhancement, increasing both the signal to background ratio (SBR) and concomitantly the limit of detection (LOD). Three types of gases, nitrogen, argon and helium were investigated individually as ambient environment. The variation in signal gain with ambient gas pressure was measured. The feasibility study of dual-pulse (DP) LIBS) in the deep VUV spectral region was carried out by optimizing a number of parameters for limit-of-detection (LOD) calibration. The pulse energy choices of laser beam, the signal recording position for the space-resolved detection system, the CCD exposure time and the number of laser shots accumulated for a spectrum were among the first few parameters optimized for the current LIBS system. The dependence of emission intensity on focusing conditions was investigated for both single-pulse (SP) and dual-pulse (DP) mode. In DP mode, the lens-to- target distance of the reheating pulse was varied while the ablation pulse was held at a fixed focusing condition. The optimal focusing for signal enhancement was found to be about 10 mm under the sample surface for single-pulse laser beam and 5 - 10 mm for the reheating pulse in dual-pulse mode. The effect of inter-pulse delay on the emission intensity were studied in vacuum and in ambient gas background in the dual-pulse configuration. An intensity peak at about 100 ns and an intensity revival in the Ī¼s range were observed on the intensity vs. inter-pulse delay curves. The optimal inter-pulse delay was considered to be 100 ns. The Ī¼s range intensity plateau led to a discussion on the plasma expansion dynamics in dual-pulse mode. Finally the limit of detection (LOD) of C and S in steel was improved by a factor of 2 or more over single pulse LIBS with the combination of optimized experimental parameters. The initial measurements and results suggest that DP-LIBS in an ambient gas environment for VUV spectroscopy is practicable and brings with it even further improvement of the LIBS performance in the VUV regime
    corecore