Digital signal processor fundamentals and system design

Digital Signal Processors (DSPs) have been used in accelerator systems for more than fifteen years and have largely contributed to the evolution towards digital technology of many accelerator systems, such as machine protection, diagnostics and control of beams, power supply and motors. This paper aims at familiarising the reader with DSP fundamentals, namely DSP characteristics and processing development. Several DSP examples are given, in particular on Texas Instruments DSPs, as they are used in the DSP laboratory companion of the lectures this paper is based upon. The typical system design flow is described; common difficulties, problems and choices faced by DSP developers are outlined; and hints are given on the best solution

An embedded system for evoked biopotential acquisition and processing

This work presents an autonomous embedded system for evoked biopotential acquisition and processing. The system is versatile and can be used on different evoked potential scenarios like medical equipments or brain computer interfaces, fulfilling the strict real-time constraints that they impose. The embedded system is based on an ARM9 processor with capabilities to port a real-time operating system. Initially, a benchmark of the Windows CE operative system running on the embedded system is presented in order to find out its real-time capability as a set. Finally, a brain computer interface based on visual evoked potentials is implemented. Results of this application recovering visual evoked potential using two techniques: the fast Fourier transform and stimulus locked inter trace correlation, are also presented.Fil: Garcia, Pablo Andres. Universidad Nacional de la Plata. Facultad de Ingeniería. Departamento de Electrotecnia. Laboratorio de Electrónica Industrial, Control e Instrumentación; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; ArgentinaFil: Spinelli, Enrique Mario. Universidad Nacional de la Plata. Facultad de Ingeniería. Departamento de Electrotecnia. Laboratorio de Electrónica Industrial, Control e Instrumentación; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; ArgentinaFil: Toccaceli, Graciela Mabel. Universidad Nacional de la Plata. Facultad de Ingeniería. Departamento de Electrotecnia. Laboratorio de Electrónica Industrial, Control e Instrumentación; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentin

Integration of UAVS with Real Time Operating Systems and Establishing a Secure Data Transmission

Indiana University-Purdue University Indianapolis (IUPUI)In today’s world, the applications of Unmanned Aerial Vehicle (UAV) systems are leaping by extending their scope from military applications on to commercial and medical sectors as well. Owing to this commercialization, the need to append external hardware with UAV systems becomes inevitable. This external hardware could aid in enabling wireless data transfer between the UAV system and remote Wireless Sensor Networks (WSN) using low powered architecture like Thread, BLE (Bluetooth Low Energy). The data is being transmitted from the flight controller to the ground control station using a MAVlink (Micro Air Vehicle Link) protocol. But this radio transmission method is not secure, which may lead to data leakage problems. The ideal aim of this research is to address the issues of integrating different hardware with the flight controller of the UAV system using a light-weight protocol called UAVCAN (Unmanned Aerial Vehicle Controller Area Network). This would result in reduced wiring and would harness the problem of integrating multiple systems to UAV. At the same time, data security is addressed by deploying an encryption chip into the UAV system to encrypt the data transfer using ECC (Elliptic curve cryptography) and transmitting it to cloud platforms instead of radio transmission

Implementation of FPGA in the Design of Embedded Systems

The use of FPGAs (Field Programmable Gate Arrays) and configurable processors is an interesting new phenomenon in embedded development. FPGAs offer all of the features needed to implement most complex designs. Clock management is facilitated by on-chip PLL (phase-locked loop) or DLL (delay-locked loop) circuitry. Dedicated memory blocks can be configured as basic single-port RAMs, ROMs, FIFOs, or CAMs. Data processing, as embodied in the devices’ logic fabric, varies widely. The ability to link the FPGA with backplanes, high-speed buses, and memories is afforded by support for various single ended and differential I/O standards. Also found on today’s FPGAs are system-building resources such as high speed serial I/Os, arithmetic modules, embedded processors, and large amounts of memory. Here in our project we have tried to implement such powerful FPGAs in the design of possible embedded systems that can be designed, burned and deployed at the site of operation for handling of many kinds of applications. In our project we have basically dealt with two of such applications –one the prioritized traffic light controller and other a speech encrypting and decrypting system

Hardware IPC for a TrustZone-assisted Hypervisor

Dissertação de mestrado em Engenharia Eletrónica Industrial e ComputadoresIn this modern era ruled by technology and the IoT (Internet of Things), embedded systems have an ubiquitous presence in our daily lives. Although they do differ from each other in their functionalities and end-purpose, they all share the same basic requirements: safety and security. Whether in a non-critical system such as a smartphone, or a critical one, like an electronic control unit of any modern vehicle, these requirements must always be fulfilled in order to accomplish a reliable and trust-worthy system. One well-established technology to address this problem is virtualization. It provides isolation by encapsulating each subsystem in separate Virtual-Machines (VMs), while also enabling the sharing of hardware resources. However, these isolated subsystems may still need to communicate with each other. Inter-Process Communication is present in most OSes’ stacks, representing a crucial part of it, which allows, through a myriad of different mechanisms, communication be- tween tasks. In a virtualized system, Inter-Partition Communication mechanisms implement the communication between the different subsystems referenced above. TrustZone technology has been in the forefront of hardware-assisted security and it has been explored for virtualization purposes, since natively it provides sep- aration between two execution worlds while enforcing, by design, different privi- lege to these execution worlds. LTZVisor, an open-source lightweight TrustZone- assisted hypervisor, emerged as a way of providing a platform for exploring how TrustZone can be exploited to assist virtualization. Its IPC mechanism, TZ- VirtIO, constitutes a standard virtual I/O approach for achieving communication between the OSes, but some overhead is caused by the introduction of the mech- anism. Hardware-based solutions are yet to be explored with this solution, which could bring performance and security benefits while diminishing overhead. Attending the reasons mentioned above, hTZ-VirtIO was developed as a way to explore the offloading of the software-based communication mechanism of the LTZVisor to hardware-based mechanisms.Atualmente, onde a tecnologia e a Internet das Coisas (IoT) dominam a so- ciedade, os sistemas embebidos são omnipresentes no nosso dia-a-dia, e embora possam diferir entre as funcionalidades e objetivos finais, todos partilham os mes- mos requisitos básicos. Seja um sistema não crítico, como um smartphone, ou um sistema crítico, como uma unidade de controlo de um veículo moderno, estes requisitos devem ser cumpridos de maneira a se obter um sistema confiável. Uma tecnologia bem estabelecida para resolver este problema é a virtualiza- ção. Esta abordagem providencia isolamento através do encapsulamento de sub- sistemas em máquinas virtuais separadas, além de permitir a partilha de recursos de hardware. No entanto, estes subsistemas isolados podem ter a necessidade de comunicar entre si. Comunicação entre tarefas está presente na maioria das pilhas de software de qualquer sistema e representa uma parte crucial dos mesmos. Num sistema virtualizado, os mecanismos de comunicação entre-partições implementam a comunicação entre os diferentes subsistemas mencionados acima. A tecnologia TrustZone tem estado na vanguarda da segurança assistida por hardware, e tem sido explorada na implementação de sistemas virtualizados, visto que permite nativamente a separação entre dois mundos de execução, e impondo ao mesmo tempo, por design, privilégios diferentes a esses mundos de execução. O LTZVisor, um hypervisor em código-aberto de baixo overhead assistido por Trust- Zone, surgiu como uma forma de fornecer uma plataforma que permite a explo- ração da TrustZone como tecnologia de assistência a virtualização. O TZ-VirtIO, mecanismo de comunicação do LTZVisor, constitui uma abordagem padrão de E/S virtuais, para permitir comunicação entre os sistemas operativos. No entanto, a introdução deste mecanismo provoca sobrecarga sobre o hypervisor. Soluções baseadas em hardware para o TZ-VirtIO ainda não foram exploradas, e podem trazer benefícios de desempenho e segurança, e diminuir a sobrecarga. Atendendo às razões mencionadas acima, o hTZ-VirtIO foi desenvolvido como uma maneira de explorar a migração do mecanismo de comunicação baseado em software do LTZVisor para mecanismos baseados em hardware

Implementation of Asymmetric Multiprocessing Support in a Real-Time Operating System

The semiconductor industry can no longer afford to rely on decreasing the size of the die, and increasing the frequency of operation to achieve higher performance. An alternative that has been proven to increase performance is multiprocessing. Multiprocessing refers to the concept of running more than one application or task on more than one central processor. Multi-core processors are the main engine of multiprocessing. In asymmetric multiprocessing, each core in a multi-core systems is independent and has its own code that determines its execution. These cores must be able to communicate and synchronize access to resources

FPGAs in Industrial Control Applications

The aim of this paper is to review the state-of-the-art of Field Programmable Gate Array (FPGA) technologies and their contribution to industrial control applications. Authors start by addressing various research fields which can exploit the advantages of FPGAs. The features of these devices are then presented, followed by their corresponding design tools. To illustrate the benefits of using FPGAs in the case of complex control applications, a sensorless motor controller has been treated. This controller is based on the Extended Kalman Filter. Its development has been made according to a dedicated design methodology, which is also discussed. The use of FPGAs to implement artificial intelligence-based industrial controllers is then briefly reviewed. The final section presents two short case studies of Neural Network control systems designs targeting FPGAs

Educational RTOS Development Board

The objective of this project was to facilitate student learning of embedded systems design. At WPI, students in ECE3849 must combine hardware and software concepts to develop real-time embedded systems in labs, a process which often frustrates students. This project identified ways to engage students in embedded systems design by 1) identifying ECE3849’s educational objectives 2) designing a versatile peripheral board to support new labs, 3) synthesizing student feedback on their frustrations and 4) developing targeted documentation for students to help alleviate their frustrations in labs. My development board, documentation, and critical analysis of student feedback provide recommendations for instructors to help future offerings of ECE3849 challenge students to design embedded systems