Failures in power-combining arrays

We derive a simple formula for the change in output when a device fails in a power-combining structure with identical matched devices. The loss is written in terms of the scattering coefficient of the failed device and reflection coefficient of an input port in the combining network. We apply this formula to several power combiners, including arrays in free space and enclosed waveguide structures. Our simulations indicate the output power degrades gracefully as devices fail, which is in agreement with previously published results

(Invited) mm-wave silicon ICs: An opportunity for holistic design

Millimeter-waves integrated circuits offer a unique opportunity for a holistic design approach encompassing RF, analog, and digital, as well as radiation and electromagnetics. The ability to deal with the complete system from the digital circuitry to on-chip antennas and everything in between offers unparalleled opportunities for completely new architectures and topologies, previously impossible due the traditional partitioning of various blocks in conventional design. This opens a plethora of new architectural and system level innovation within the integrated circuit platform. This paper reviews some of the challenges and opportunities for mm-wave ICs and presents several solutions to them

Reconfigurable Reflectarrays and Array Lenses for Dynamic Antenna Beam Control: A Review

Advances in reflectarrays and array lenses with electronic beam-forming capabilities are enabling a host of new possibilities for these high-performance, low-cost antenna architectures. This paper reviews enabling technologies and topologies of reconfigurable reflectarray and array lens designs, and surveys a range of experimental implementations and achievements that have been made in this area in recent years. The paper describes the fundamental design approaches employed in realizing reconfigurable designs, and explores advanced capabilities of these nascent architectures, such as multi-band operation, polarization manipulation, frequency agility, and amplification. Finally, the paper concludes by discussing future challenges and possibilities for these antennas.Comment: 16 pages, 12 figure

The Future of High Frequency Circuit Design

The cut-off wavelengths of integrated silicon transistors have exceeded the die sizes of the chips being fabricated with them. Combined with the ability to integrate billions of transistors on the same die, this size-wavelength cross-over has produced a unique opportunity for a completely new class of holistic circuit design combining electromagnetics, device physics, circuits, and communication system theory in one place. In this paper, we discuss some of these opportunities and their associated challenges in greater detail and provide a few of examples of how they can be used in practice

Distributed Modeling Approach for Electrical and Thermal Analysis of High-Frequency Transistors

The research conducted in this dissertation is focused on developing modeling approaches for analyzing high-frequency transistors and present solutions for optimizing the device output power and gain. First, a literature review of different transistor types utilized in high-frequency regions is conducted and gallium nitride high electron mobility transistor is identified as the promising device for these bands. Different structural configurations and operating modes of these transistors are explained, and their applications are discussed. Equivalent circuit models and physics-based models are also introduced and their limitations for analyzing the small-signal and large-signal behavior of these devices are explained. Next, a model is developed to investigate the thermal properties of different semiconductor substrates. Heat dissipation issues associated with some substrate materials, such as sapphire, silicon, and silicon carbide are identified, and thinning the substrates is proposed as a preliminary solution for addressing them. This leads to a comprehensive and universal approach to increase the heat dissipation capabilities of any substrate material and 2X-3X improvement is achieved according to this novel technique. Moreover, for analyzing the electrical behavior of these devices, a small-signal model is developed to examine the operation of transistors in the linear regions. This model is obtained based on an equivalent circuit which includes the distributed effects of the device at higher frequency bands. In other words, the wave propagation effects and phase velocity mismatches are considered when developing the model. The obtained results from the developed simulation tool are then compared with the measurements and excellent agreement is achieved between the two cases, which serves as the proof for validation. Additionally, this model is extended to predict and analyze the nonlinear behavior of these transistors and the developed tool is validated according to the obtained large-signal analysis results from measurement. Based on the developed modeling approach, a novel fabrication technique is also proposed which ensures the high-frequency operability of current devices with the available fabrication technologies, without forfeiting the gain and output power. The technical details regarding this approach and a sample configuration of the electrode model for the transistor based on the proposed design are also provided

Mask Programmable CMOS Transistor Arrays for Wideband RF Integrated Circuits

A mask programmable technology to implement RF and microwave integrated circuits using an array of standard 90-nm CMOS transistors is presented. Using this technology, three wideband amplifiers with more than 15-dB forward transmission gain operating in different frequency bands inside a 4-22-GHz range are implemented. The amplifiers achieve high gain-bandwidth products (79-96 GHz) despite their standard multistage designs. These amplifiers are based on an identical transistor array interconnected with application specific coplanar waveguide (CPW) transmission lines and on-chip capacitors and resistors. CPW lines are implemented using a one-metal-layer post-processing technology over a thick Parylene-N (15 mum ) dielectric layer that enables very low loss lines (~0.6 dB/mm at 20 GHz) and high-performance CMOS amplifiers. The proposed integration approach has the potential for implementing cost-efficient and high-performance RF and microwave circuits with a short turnaround time