Power management circuit: design and comparison of efficient techniques for ultra-low power analog switch and rectifier circuit

Dissertação de mestrado integrado em Engenharia Eletrónica Industrial e Computadores, Instrumentação e Microssistemas EletrónicosA presente dissertação de mestrado apresenta um estudo na área de CMOS em circuitos analógicos/digitais para extração e conversão de potência adequado para aplicações em energy harvesting. As principais contribuições científicas deste trabalho são: o desenvolvimento de circuitos de baixo consumo energético, tais como um interruptor analógico e um retificador que podem extrair e converter eficientemente a potência de saída do energy harvester. Com os dois circuitos apresentados na presente dissertação, é possível alimentar um nó de uma rede de sensores sem fios. Estes circuitos foram projetados utilizando a tecnologia CMOS de 130 nm e as respetivas simulações foram realizadas utilizando o software Cadence Virtuoso Analog Environment. Neste trabalho projetou-se novo interruptor analógico para aplicações em energy harvesting com especial atenção para a obtenção de um baixo consumo energético. A configuração apresentada consegue atingir uma baixa resistência, quando em condução (ON), e evitar correntes reversas indesejadas provenientes da carga. Os resultados das simulações revelam que o circuito: consome uma potência de 200.8 nW; atinge uma baixa resistência, quando em condução, de 216 Ω; gera uma baixa corrente de fuga de 44 pA. Assim sendo, é possível verificar que este circuito consegue operar com um baixo consumo, baixa tensão e com uma baixa frequência. Para além disso, o mesmo interruptor analógico consegue realizar a técnica de up-conversion dentro do circuito de controlo de potência, o que indica a possibilidade de o mesmo contribuir para uma aplicação real com energy harvesters vibracionais. O retificador em CMOS proposto é constituído por dois estágios: um passivo com um conversor de tensão negativa; e um outro estágio com um díodo ativo controlado por um circuito de cancelamento de threshold. O primeiro estágio é responsável por retificar completamente o sinal de entrada com uma queda de tensão de 1 mV, enquanto que o último tem a função de reduzir a corrente reversa indesejada, o que consequentemente consegue aumentar a potência transferida para a carga. Deste modo, o circuito consegue atingir uma eficiência em tensão e potência de 99 % e 90%, respetivamente, para um sinal de entrada com 0.45 V de amplitude e para cargas resistivas de valor baixo. Ainda assim, este circuito consegue funcionar a uma banda de frequências desde os 800 Hz até 51.2 kHz, o que se revela ser promissor para a aplicação prática deste projeto.The master dissertation presents a study in the area of mixed analog/digital CMOS power extraction and conversion circuits for Power Management Circuit (PMC) suitable for energy harvesting applications. The main contributions of the work are the development of low power circuits, such as an Analog Switch and a Rectifier, that can efficiently extract and convert the output power of the vibrational energy harvester into suitable electric energy for powering a Wireless Sensor Network (WSN) node. The circuit components were fully designed in the standard 130 nm CMOS process, and the respective simulation experiments were carried out using the Cadence Virtuoso Analog Environment. A new Analog Switch was designed for energy harvesting applications with special consideration for achieving low power consumption. The proposed structure can achieve a reduced ON-resistance and avoid the reverse leakage current from the load. Simulation results reveal a power consumption of about 200.8 nW, a low ON-resistance of 244.6 Ω, and a low leakage current of around 44 pA, which indicates that the analog switch has features of low power consumption, low voltage, and low-frequency operation. Furthermore, this switching circuit is suitable for performing the up-conversion technique in the PMC, which may contribute to the real application of vibrational energy harvesters. The proposed CMOS Rectifier consists of two stages, one passive stage with a negative voltage converter, and another stage with an active diode controlled by a threshold cancellation circuit. The former stage conducts the signal full-wave rectification with a voltage drop of 1 mV while the latter reduces the reverse leakage current, consequently enhancing the output power delivered to the ohmic load. As a result, the rectifier can achieve a voltage and a power conversion efficiency of over 99 % and 90 %, respectively, for an input voltage of 0.45 V and low ohmic loads. This circuit works for an operating frequency range from 800 Hz to 51.2 kHz, which is promising for practical applications

Rectification, amplification and switching capabilities for energy harvesting systems: power management circuit for piezoelectric energy harvester

Dissertação de mestrado em Biomedical EngineeringA new energy mechanism needs to be addressed to overcome the battery dependency, and consequently extend Wireless Sensor Nodes (WSN) lifetime effectively. Energy Harvesting is a promising technology that can fulfill that premise. This work consists of the realization of circuit components employable in a management system for a piezoelectric-based energy harvester, with low power consumption and high efficiency. The implementation of energy harvesting systems is necessary to power-up front-end applications without any battery. The input power and voltage levels generated by the piezoelectric transducer are relatively low, especially in small-scale systems, as such extra care has to be taken in power consumption and efficiency of the circuits. The main contribution of this work is a system capable of amplifying, rectifying and switching the unstable signal from an energy harvester source. The circuit components are designed based on 0.13 Complementary Metal-Oxide-Semiconductor (CMOS) technology. An analog switch, capable of driving the harvesting circuit at a frequency between 1 and 1 , with proper temperature behaviour, is designed and verified. An OFF resistance of 520.6 Ω and isolation of −111.24 , grant excellent isolation to the circuit. The designed voltage amplifier is capable of amplifying a minor signal with a gain of 42.56 , while requiring low power consumption. The output signal is satisfactorily amplified with a reduced offset voltage of 8 . A new architecture of a two-stage active rectifier is proposed. The power conversion efficiency is 40.4%, with a voltage efficiency of up to 90%. Low power consumption of 17.7 is achieved by the rectifier, with the embedded comparator consuming 113.9 . The outcomes validate the circuit’s power demands, which can be used for other similar applications in biomedical, industrial, and commercial fields.Para combater a dependência dos dispositivos eletrónicos relativamente ás baterias é necessário um novo sistema energético, que permita prolongar o tempo de vida útil dos mesmos. Energy Harvesting é uma tecnologia promissora utilizada para alimentar dispositivos sem bateria. Este trabalho consiste na realização de componentes empregáveis num circuito global para extrair energia a partir ds vibrações de um piezoelétricos com baixo consumo de energia e alta eficiência. Os níveis de potência e voltagem gerados pelo transdutor piezoelétrico são relativamente baixos, especialmente em sistemas de pequena escala, por isso requerem cuidado extra relativamente ao consumo de energia e eficiência dos circuitos. A principal contribuição deste trabalho é um sistema apropriado para amplificar, retificar e alternar o sinal instável proveniente de uma fonte de energy harvesting. Os componentes do sistema são implementados com base na tecnologia CMOS com 0.13 . Um interruptor analógico capaz de modelar a frequência do sinal entre 1 e 1 e estável perante variações de temperatura, é implementado. O circuito tem um excelente isolamento de −111.24 , devido a uma resistência OFF de 520.6 Ω. O amplificador implementado é apto a amplificar um pequeno sinal com um ganho de 42.56 e baixo consumo. O sinal de saída é satisfatoriamente amplificado com uma voltagem de offset de 8 . Um retificador ativo de dois estágios com uma nova arquitetura é proposto. A eficiência de conversão de energia atinge os 40.4%, com uma eficiência de voltagem até 90%. O retificador consome pouca energia, apenas 17.7 , incorporando um comparador de 113.9 . Os resultados validam as exigências energéticas do circuito, que pode ser usado para outras aplicações similares no campo biomédico, industrial e comercial

Design and Assembly of High-Temperature Signal Conditioning System on LTCC with Silicon Carbide CMOS Circuits

The objective of the work described in this dissertation paper is to develop a prototype electronic module on a low-temperature co-fired ceramic (LTCC) material. The electronic module would perform signal conditioning of sensor signals (thermocouples) operating under extreme conditions for applications like gas turbines to collect data on the health of the turbine blades during operation so that the turbines do not require shutdown for inspection to determine if maintenance is required. The collected data can indicate when such shutdowns, which cost $1M per day, should be scheduled and maintenance actually performed. The circuits for the signal conditioning system within the prototype module must survive the extreme temperature, pressure, and centrifugal force, or G-force, present in these settings. Multiple fabrication runs on different integrated silicon carbide (SiC) process technologies have been carried out to meet the system requirements. The key circuits described in this dissertation are - two-stage op amp topologies and voltage reference, which are designed and fabricated in a new SiC CMOS process. The SiC two-stage op amp with PFET differential input pair showed 48.9 dB of DC gain at 500oC. The voltage reference is the first in SiC CMOS technology to employ an op amp-based topology. The op amp circuit in the voltage reference is a two-stage with NFET differential input pair that uses the indirect compensation technique for the first time in the SiC CMOS process to provide 42.5 dB gain at 350oC. The designed prototype module implemented with these circuits was verified to provide signal conditioning and signal transmission at 300oC. The signal transmission circuit on the module was also verified to operate with a resonant inductive wireless power transfer method at a frequency of 11.8 MHz for the first time. A second prototype module was also developed with the previously fabricated 1.2 µm SiC CMOS process. The second module was successfully tested (with wired power supply) to operate at 440oC inside a probe-station and also verified for the first time to sustain signal transmission (34.65 MHz) capability inside a spin-rig at a rotational speed of 10,920 rpm. All designed modules have dimensions of (length) 68.5 mm by (width) 34.3 mm to conform to the physical size requirements of the gas turbine blade

Un nuevo rectificador reconfigurable CMOS para recolectores de energía piezoeléctrica en dispositivos portables

Los recolectores de energía para dispositivos portables tienen una aplicación potencial en la conversión de la energía del movimiento humano en energía eléctrica para alimentar dispositivos inteligentes de monitoreo de la salud, de la industria textil, así como de relojes y lentes inteligentes. Estos recolectores de energía requieren circuitos rectificadores óptimos que maximicen sus eficiencias de carga. En este estudio se presenta el diseño de un novedoso rectificador reconfigurable metal óxido semiconductor complementario (CMOS) para recolectores de energía piezoeléctrica portables que puede aumentar sus eficiencias de carga. El rectificador diseñado se basa en la tecnología de proceso CMOS estándar de 0,18 µm considerando un patrón geométrico con un área total de silicio de . El circuito rectificador propuesto tiene dos puertas de transmisión (TG) que están compuestas por cuatro transistores rectificadores con una carga de 45 kΩ, un voltaje mínimo de entrada de 500 mV y un voltaje máximo de 3,3 V. Los resultados de las simulaciones numéricas del funcionamiento del rectificador indican una eficiencia de conversión de voltaje del 99,4 % y una eficiencia de conversión de potencia de hasta el 63,3 %. El rectificador propuesto puede utilizarse para aumentar la eficiencia de carga de los recolectores de energía piezoeléctrica portables.Wearable energy harvesters have potential application in the conversion of human-motion energy into electrical energy to power smart health-monitoring devices, the textile industry, smartwatches, and glasses. These energy harvesters require optimal rectifier circuits that maximize their charging efficiencies. In this study, we present the design of a novel complementary metal-oxide semiconductor (CMOS) reconfigurable rectifier for wearable piezoelectric energy harvesters that can increase their charging efficiencies. The designed rectifier is based on standard 0.18 µm CMOS process technology considering a geometrical pattern with a total silicon area of 54.765 µm x 86.355 µm. The proposed rectifier circuit has two transmission gates (TG) that are composed of four rectifier transistors with a charge of 45 kΩ, a minimum input voltage of 500 mV and a maximum voltage of 3.3 V. Results of numerical simulations of the rectifier performance indicate a voltage conversion efficiency of 99.4% and a power conversion efficiency up to 63.3%. The proposed rectifier can be used to increase the charging efficiency of wearable piezoelectric energy harvesters

Design of a low-voltage CMOS RF receiver for energy harvesting sensor node

In this thesis a CMOS low-power and low-voltage RF receiver front-end is presented. The main objective is to design this RF receiver so that it can be powered by a piezoelectric energy harvesting power source, included in a Wireless Sensor Node application. For this type of applications the major requirements are: the low-power and low-voltage operation, the reduced area and cost and the simplicity of the architecture. The system key blocks are the LNA and the mixer, which are studied and optimized with greater detail, achieving a good linearity, a wideband operation and a reduced introduction of noise. A wideband balun LNA with noise and distortion cancelling is designed to work at a 0.6 V supply voltage, in conjunction with a double-balanced passive mixer and subsequent TIA block. The passive mixer operates in current mode, allowing a minimal introduction of voltage noise and a good linearity. The receiver analog front-end has a total voltage conversion gain of 31.5 dB, a 0.1 - 4.3 GHz bandwidth, an IIP3 value of -1.35 dBm, and a noise figure lower than 9 dB. The total power consumption is 1.9 mW and the die area is 305x134.5 m2, using a standard 130 nm CMOS technology

A piezoelectric based energy harvester interface for a CMOS wireless sensor IC

In this thesis a piezoelectric energy harvesting system, responsible for regulating the power output of a piezoelectric transducer subjected to ambient vibration, is designed to power an RF receiver with a 6 mW power consump-tion. The electrical characterisation of the chosen piezoelectric transducer is the starting point of the design, which subsequently presents a full-bridge cross-coupled rectifier that rectifies the AC output of the transducer and a low-dropout regulator responsible for delivering a constant voltage system output of 0.6 V, with low voltage ripple, which represents the receiver’s required sup-ply voltage. The circuit is designed using CMOS 130 nm UMC technology, and the system presents an inductorless architecture, with reduced area and cost. The electrical simulations run for the complete circuit lead to the conclusion that the proposed piezoelectric energy harvesting system is a plausible solution to power the RF receiver, provided that the chosen transducer is subjected to moderate levels of vibration

High-Efficiency Low-Voltage Rectifiers for Power Scavenging Systems

Abstract Rectifiers are commonly used in electrical energy conversion chains to transform the energy obtained from an AC signal source to a DC level. Conventional bridge and gate cross-coupled rectifier topologies are not sufficiently power efficient, particularly when input amplitudes are low. Depending on their rectifying element, their power efficiency is constrained by either the forward-bias voltage drop of a diode or the threshold voltage of a diode-connected MOS transistor. Advanced passive rectifiers use threshold cancellation techniques to effectively reduce the threshold voltage of MOS diodes. Active rectifiers use active circuits to control the conduction angle of low-loss MOS switches. In this thesis, an active rectifier with a gate cross-coupled topology is proposed, which replaces the diode-connected MOS transistors of a conventional rectifier with low-loss MOS switches. Using the inherent characteristics of MOS transistors as comparators, dynamic biasing of the bulks of main switches and small pull-up transistors, the proposed self-supplied active rectifier exhibits smaller voltage drop across the main switches leading to a higher power efficiency compared to conventional rectifier structures for a wide range of operating frequencies in the MHz range. Delivery of high load currents is another feature of the proposed rectifier. Using the bootstrapping technique, single- and double-reservoir based rectifiers are proposed. They present higher power and voltage conversion efficiencies compared to conventional rectifier structures. With a source amplitude of 3.3 V, when compared to the gate cross-coupled topology, the proposed active rectifier offers power and voltage conversion efficiencies improved by up to 10% and 16% respectively. The proposed rectifier using the bootstrap technique, including double- and single-reservoir schemes, are well suited for very low input amplitudes. They present power and voltage conversion efficiencies of 75% and 76% at input amplitude of 1.0 V and maintain their high efficiencies over input amplitudes greater than 1.0V. Single-reservoir bootstrap rectifier also reduces die area by 70% compared to its double-reservoir counterpart.---------Résumé Les redresseurs sont couramment utilisés dans de nombreux systèmes afin de transformer l'énergie électrique obtenue à partir d'une source alternative en une alimentation continue. Les topologies traditionnelles telles que les ponts de diodes et les redresseurs se servant de transistors à grilles croisées-couplées ne sont pas suffisamment efficaces en terme d’énergie, en particulier pour des signaux à faibles amplitudes. Dépendamment de leur élément de redressement, leur efficacité en termes de consommation d’énergie est limitée soit par la chute de tension de polarisation directe d'une diode, soit par la tension de seuil du transistor MOS. Les redresseurs passifs avancés utilisent une technique de conception pour réduire la tension de seuil des diodes MOS. Les redresseurs actifs utilisent des circuits actifs pour contrôler l'angle de conduction des commutateurs MOS à faible perte. Dans cette thèse, nous avons proposé un redresseur actif avec une topologie en grille croisée-couplée. Elle utilise des commutateurs MOS à faible perte à la place des transistors MOS connectés en diode comme redresseurs. Le circuit proposé utilise: des caractéristiques intrinsèques des transistors MOS pour les montages comparateurs et une polarisation dynamique des substrats des commutateurs principaux supportés par de petits transistors de rappel. Le redresseur proposé présente des faibles chutes de tension à travers le commutateur principal menant à une efficacité de puissance plus élevée par rapport aux structures d’un redresseur conventionnel pour une large gamme de fréquences de fonctionnement de l’ordre des MHz. La conduction des courants de charge élevée est une autre caractéristique du redresseur proposé. En utilisant la méthode de bootstrap, des redresseurs à simple et à double réservoir sont proposés. Ils présentent une efficacité de puissance et un rapport de conversion de tension élevés en comparaison avec les structures des redresseurs conventionnels. Avec une amplitude de source de 3,3 V, le redresseur proposé offre des efficacités de puissance et de conversion de tension améliorées par rapport au circuit à transistors croisés couplés. Ces améliorations atteignent 10% et 16% respectivement. Les redresseurs proposés utilisent la technique de bootstrap. Ils sont bien adaptés pour des amplitudes d'entrée très basses. À une amplitude d'entrée de 1,0 V, ces derniers redresseurs présentent des rendements de conversion de puissance et de tension de 75% et 76%. Le redresseur à simple réservoir réduit également l’aire de silicium requise de 70% par rapport à la version à double-réservoir

Design Techniques of Highly Integrated Hybrid-Switched-Capacitor-Resonant Power Converters for LED Lighting Applications

The Light-emitting diodes (LEDs) are rapidly emerging as the dominant light source given their high luminous efficacy, long lift span, and thanks to the newly enacted efficiency standards in favor of the more environmentally-friendly LED technology. The LED lighting market is expected to reach USD 105.66 billion by 2025. As such, the lighting industry requires LED drivers, which essentially are power converters, with high efficiency, wide input/output range, low cost, small form factor, and great performance in power factor, and luminance flicker. These requirements raise new challenges beyond the traditional power converter topologies. On the other hand, the development and improvement of new device technologies such as printed thin-film capacitors and integrated high voltage/power devices opens up many new opportunities for mitigating such challenges using innovative circuit design techniques and solutions. Almost all electric products needs certain power delivery, regulation or conversion circuits to meet the optimized operation conditions. Designing a high performance power converter is a real challenge given the market’s increasing requirements on energy efficiency, size, cost, form factor, EMI performance, human health impact, and so on. The design of a LED driver system covers from high voltage AC/DC and DC/DC power converters, to high frequency low voltage digital controllers, to power factor correction (PFC) and EMI filtering techniques, and to safety solutions such as galvanic isolation. In this thesis, we study design challenges and present corresponding solutions to realize highly integrated and high performance LED drivers combining switched-capacitor and resonant converters, applying re-configurable multi-level circuit topology, utilizing sigma delta modulation, and exploring capacitive galvanic isolation. A hybrid switched-capacitor-resonant (HSCR) LED driver based on a stackable switched-capacitor (SC) converter IC rated for 15 to 20 W applications. Bulky transformers have been replaced with a SC ladder to perform high-efficiency voltage step-down conversion; an L-C resonant output network provides almost lossless current regulation and demonstrates the potential of capacitive galvanic isolation. The integrated SC modules can be stacked in the voltage domain to handle a large range of input voltage ranges that largely exceed the voltage limitation of the medium-voltage-rated 120 V silicon technology. The LED driver demonstrates > 91% efficiency over a rectified input DC voltage range from 160 VDC to 180 VDC with two stacked ICs; using a stack of four ICs > 89.6% efficiency is demonstrated over an input range from 320 VDC to 360 VDC . The LED driver can dim its output power to around 10% of the rated power while maintaining >70% efficiency with a PWM controlled clock gating circuit. Next, the design of AC main rectifier and inverter front end with sigma delta modulation is described. The proposed circuits features a pair of sigma delta controlled multilevel converters. The first is a multilevel rectifier responsible for PFC and dimming. The second is a bidirectional multilevel inverter used to cancel AC power ripple from the DC bus. The system also contains an output stage that powers the LEDs with DC and provides for galvanic isolation. Its functional performance indicates that integrated multilevel converters are a viable topology for lighting and other similar applications