A Low Jitter Wideband Fractional-N Subsampling Phase Locked Loop (SSPLL)

Frequency synthesizers have become a crucial building block in the evolution of modern communication systems and consumer electronics. The spectral purity performance of frequency synthesizers limits the achievable data-rate and presents a noise-power tradeoff. For communication standards such as LTE where the channel spacing is a few kHz, the synthesizers must provide high frequencies with sufficiently wide frequency tuning range and fine frequency resolutions. Such stringent performance must be met with a limited power and small chip area. In this thesis a wideband fractional-N frequency synthesizer based on a subsampling phase locked loop (SSPLL) is presented. The proposed synthesizer which has a frequency resolution less than 100Hz employs a digital fractional controller (DFC) and a 10-bit digital-to-time converter (DTC) to delay the rising edges of the reference clock to achieve fractional phase lock. For fast convergence of the delay calibration, a novel two-step delay correlation loop (DCL) is employed. Furthermore, to provide optimum settling and jitter performance, the loop transfer characteristics during frequency acquisition and phase-lock are decoupled using a dual input loop filter (DILF). The fractional-N sub-sampling PLL (FNSSPLL) is implemented in a TSMC 40nm CMOS technology and occupies a total active area of 0.41mm^2. The PLL operates over frequency range of 2.8 GHz to 4.3 GHz (42% tuning range) while consuming 9.18mW from a 1.1V supply. The integrated jitter performance is better than 390 fs across all fractional frequency channel. The worst case fractional spur of -48.3 dBc occurs at a 650 kHz offset for a 3.75GHz fractional channel. The in-band phase noise measured at a 200 kHz offset is -112.5 dBc/Hz

AROD test model hardware, volume 2 Final report

Engineering design data on vehicle-borne subsystems of airborne range and orbit determination syste

TDRSS multimode transponder program. Phase 2: Equipment development

This report contains a complete description of the TDRS Multimode Transponder and its associated ground support equipment. The transponder will demonstrate candidate modulation techniques to provide the required information for the design of an eventual VHF/UHF transponder suitable for installation in a user satellite, capable of operating as part of a Tracking and Data Relay Satellite (TDRS) systems. Use of geosynchronous TDRS which can serve both low data rate users at VHF and high data rate users at other frequencies has been considered. The effects of radio frequency interference from the earth and of multipath propagation due to reflections from the earth are expected to pose problems for the TDRS system at VHF. Investigations have suggested several modulation techniques that offer promise to overcome these problems