2,320 research outputs found

    Minimize end-to-end delay through cross-layer optimization in multi-hop wireless sensor networks

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    End-to-end delay plays a very important role in wireless sensor networks. It refers to the total time taken for a single packet to be transmitted across a network from source to destination. There are many factors could affect the end-to-end delay, among them the routing path and the interference level along the path are the two basic elements that could have significant influence on the result of the end-to-end delay. This thesis presents a transmission scheduling scheme that minimizes the end-to-end delay when the node topology is given. The transmission scheduling scheme is designed based on integer linear programming and the interference modeling is involved. By using this scheme, we can guarantee that no conflicting transmission will appear at any time during the transmission. A method of assigning the time slot based on the given routing is presented. The simulation results show that the link scheduling scheme can significantly reduce the end-to-end delay. Further, this article also shows two methods which could directly addresses routing and slot assignment, one is MI+MinDelay algorithm and the other is called One-Phase algorithm. A comparison was made between the two and the simulation result shows the latter one leads to smaller latency while it takes much more time to be solved. Besides, due to the different routing policy, we also demonstrate that the shortest path routing does not necessarily result in minimum end-to-end delay --Abstract, page ii

    Full duplex switched ethernet for next generation "1553B" -based applications

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    Over the last thirty years, the MIL-STD 1553B data bus has been used in many embedded systems, like aircrafts, ships, missiles and satellites. However, the increasing number and complexity of interconnected subsystems lead to emerging needs for more communication bandwidth. Therefore, a new interconnection system is needed to overcome the limitations of the MIL-STD 1553B data bus. Among several high speed networks, Full Duplex Switched Ethernet is put forward here as an attractive candidate to replace the MIL-STD 1553B data bus. However, the key argument against Switched Ethernet lies in its non-deterministic behavior that makes it inadequate to deliver hard timeconstrained communications. Hence, our primary objective in this paper is to achieve an accepted QoS level offered by Switched Ethernet, to support diverse "1553B"-based applications requirements. We evaluate the performance of traffic shaping techniques on Full Duplex Switched Ethernet with an adequate choice of service strategy in the switch, to guarantee the real-time constraints required by these specific 1553B-based applications. An analytic study is conducted, using the Network Calculus formalism, to evaluate the deterministic guarantees offered by our approach. Theoretical analysis are then investigated in the case of a realistic "1553B"-based application extracted from a real military aircraft network. The results herein show the ability of profiled Full Duplex Switched Ethernet to satisfy 1553B-like real-time constraints
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