Towards efficient and reconfigurable next-generation optical fronthaul networks for massive MIMO

This paper summaries our recent research on digital radio over fibre (DRoF) based optical fronthaul links and experimentally demonstrates a novel last-mile wireless coverage system incorporating data compression, time-division multiplexing (TDM) based packetization, and wavelength division multiplexing (WDM) based optical transmission. Compression reduces the fronthaul data rate required per service by a factor of 3 when compared with the common public radio interface (CPRI) standard, enabling efficient radio resource distribution over optical fibre infrastructure. The new packetization mechanism and WDM architecture enable fully reconfigurable resource allocation in a fronthaul network for 20MHz-bandwidth RF inputs with 64x64 MIMO carried over an aggregated compressed optical data rate of 32Gbps using 4 wavelengths. The experimental results show over 40dB RF dynamic range with < 8% error value magnitude (EVM) for the 64 quadrature amplitude modulation (64-QAM) input signals across all the WDM channels while the lowest EVM is less than 2%. Meanwhile, this field-programmable gate array (FPGA) based DRoF system allows flexible, software definable and easy-scalable dynamic antenna resource allocatio

Efficient Intra-Rack Resource Disaggregation for HPC Using Co-Packaged DWDM Photonics

The diversity of workload requirements and increasing hardware heterogeneity in emerging high performance computing (HPC) systems motivate resource disaggregation. Resource disaggregation allows compute and memory resources to be allocated individually as required to each workload. However, it is unclear how to efficiently realize this capability and cost-effectively meet the stringent bandwidth and latency requirements of HPC applications. To that end, we describe how modern photonics can be co-designed with modern HPC racks to implement flexible intra-rack resource disaggregation and fully meet the bit error rate (BER) and high escape bandwidth of all chip types in modern HPC racks. Our photonic-based disaggregated rack provides an average application speedup of 11% (46% maximum) for 25 CPU and 61% for 24 GPU benchmarks compared to a similar system that instead uses modern electronic switches for disaggregation. Using observed resource usage from a production system, we estimate that an iso-performance intra-rack disaggregated HPC system using photonics would require 4x fewer memory modules and 2x fewer NICs than a non-disaggregated baseline.Comment: 15 pages, 12 figures, 4 tables. Published in IEEE Cluster 202

Real-Time Demonstration of Concurrent Upstream and Inter-ONU Communications in Hybrid OFDM DFMA PONs

This paper presents the first real-time experimental demonstration of concurrent upstream and inter-ONU communications in a hybrid OFDM DFMA PON, enabled by a simple low-cost alteration to the remote node. Real-time FPGA-based DSP, incorporating a 128-pt FFT and a joint sideband processing technique, is used to demultiplex different sub-wavelength channels at the ONU and OLT receivers. The simple modification in the remote node removes the need for direct user-to-user data to pass via the OLT and core network thus providing ultra-low latency inter-ONU connectivity to support a variety of newly emerging latency sensitive 5G services. The presented PON is validated with two subwavelength bands, each capable of carrying one of two possible orthogonal channels ( I or Q ). The dynamic channel and subcarrier allocation allows flexible allocation of PON capacity between upstream and inter-ONU links for dynamic on-demand capacity allocation and also performance optimisation according to the different length dependent link characteristics. Moreover, the backscattering effect associated with upstream signals is shown to have negligible effect on the BER performance of the inter-ONU communications

FPGA-based multi-view stereo system with flexible measurement setup

In recent years, stereoscopic image processing algorithms have gained importance for a variety of applications. To capture larger measurement volumes, multiple stereo systems are combined into a multi-view stereo (MVS) system. To reduce the amount of data and the data rate, calculation steps close to the sensors are outsourced to Field Programmable Gate Arrays (FPGAs) as upstream computing units. The calculation steps include lens distortion correction, rectification and stereo matching. In this paper a FPGA-based MVS system with flexible camera arrangement and partly overlapping field of view is presented. The system consists of four FPGA-based passive stereoscopic systems (Xilinx Zynq-7000 7020 SoC, EV76C570 CMOS sensor) and a downstream processing unit (Zynq Ultrascale ZU9EG SoC). This synchronizes the sensor near processing modules and receives the disparity maps with corresponding left camera image via HDMI. The subsequent computing unit calculates a coherent 3D point cloud. Our developed FPGA-based 3D measurement system captures a large measurement volume at 24 fps by combining a multiple view with eight cameras (using Semi-Global Matching for an image size of 640 px × 460 px, up to 256 px disparity range and with aggregated costs over 4 directions). The capabilities and limitation of the system are shown by an application example with optical non-cooperative surface

Photonic spiking neural networks with event-driven femtojoule optoelectronic neurons based on Izhikevich-inspired model

Photonic spiking neural networks (PSNNs) potentially offer exceptionally high throughput and energy efficiency compared to their electronic neuromorphic counterparts while maintaining their benefits in terms of event-driven computing capability. While state-of-the-art PSNN designs require a continuous laser pump, this paper presents a monolithic optoelectronic PSNN hardware design consisting of an MZI mesh incoherent network and event-driven laser spiking neurons. We designed, prototyped, and experimentally demonstrated this event-driven neuron inspired by the Izhikevich model incorporating both excitatory and inhibitory optical spiking inputs and producing optical spiking outputs accordingly. The optoelectronic neurons consist of two photodetectors for excitatory and inhibitory optical spiking inputs, electrical transistors’ circuits providing spiking nonlinearity, and a laser for optical spiking outputs. Additional inclusion of capacitors and resistors complete the Izhikevich-inspired optoelectronic neurons, which receive excitatory and inhibitory optical spikes as inputs from other optoelectronic neurons. We developed a detailed optoelectronic neuron model in Verilog-A and simulated the circuit-level operation of various cases with excitatory input and inhibitory input signals. The experimental results closely resemble the simulated results and demonstrate how the excitatory inputs trigger the optical spiking outputs while the inhibitory inputs suppress the outputs. The nanoscale neuron designed in our monolithic PSNN utilizes quantum impedance conversion. It shows that estimated 21.09 fJ/spike input can trigger the output from on-chip nanolasers running at a maximum of 10 Gspike/second in the neural network. Utilizing the simulated neuron model, we conducted simulations on MNIST handwritten digits recognition using fully connected (FC) and convolutional neural networks (CNN). The simulation results show 90% accuracy on unsupervised learning and 97% accuracy on a supervised modified FC neural network. The benchmark shows our PSNN can achieve 50 TOP/J energy efficiency, which corresponds to 100 × throughputs and 1000 × energy-efficiency improvements compared to state-of-art electrical neuromorphic hardware such as Loihi and NeuroGrid