64,740 research outputs found

    B+-tree Index Optimization by Exploiting Internal Parallelism of Flash-based Solid State Drives

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    Previous research addressed the potential problems of the hard-disk oriented design of DBMSs of flashSSDs. In this paper, we focus on exploiting potential benefits of flashSSDs. First, we examine the internal parallelism issues of flashSSDs by conducting benchmarks to various flashSSDs. Then, we suggest algorithm-design principles in order to best benefit from the internal parallelism. We present a new I/O request concept, called psync I/O that can exploit the internal parallelism of flashSSDs in a single process. Based on these ideas, we introduce B+-tree optimization methods in order to utilize internal parallelism. By integrating the results of these methods, we present a B+-tree variant, PIO B-tree. We confirmed that each optimization method substantially enhances the index performance. Consequently, PIO B-tree enhanced B+-tree's insert performance by a factor of up to 16.3, while improving point-search performance by a factor of 1.2. The range search of PIO B-tree was up to 5 times faster than that of the B+-tree. Moreover, PIO B-tree outperformed other flash-aware indexes in various synthetic workloads. We also confirmed that PIO B-tree outperforms B+-tree in index traces collected inside the Postgresql DBMS with TPC-C benchmark.Comment: VLDB201

    Improving the Performance and Endurance of Persistent Memory with Loose-Ordering Consistency

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    Persistent memory provides high-performance data persistence at main memory. Memory writes need to be performed in strict order to satisfy storage consistency requirements and enable correct recovery from system crashes. Unfortunately, adhering to such a strict order significantly degrades system performance and persistent memory endurance. This paper introduces a new mechanism, Loose-Ordering Consistency (LOC), that satisfies the ordering requirements at significantly lower performance and endurance loss. LOC consists of two key techniques. First, Eager Commit eliminates the need to perform a persistent commit record write within a transaction. We do so by ensuring that we can determine the status of all committed transactions during recovery by storing necessary metadata information statically with blocks of data written to memory. Second, Speculative Persistence relaxes the write ordering between transactions by allowing writes to be speculatively written to persistent memory. A speculative write is made visible to software only after its associated transaction commits. To enable this, our mechanism supports the tracking of committed transaction ID and multi-versioning in the CPU cache. Our evaluations show that LOC reduces the average performance overhead of memory persistence from 66.9% to 34.9% and the memory write traffic overhead from 17.1% to 3.4% on a variety of workloads.Comment: This paper has been accepted by IEEE Transactions on Parallel and Distributed System

    Using SMS text messaging for teaching and data collection in the behavioral sciences

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    Recent interest in university teaching has focused on interactivity in lectures and practical classes, and teachers in several fields have set up systems in which students can interact with the lecturer using mobile-phone-based SMS text messaging. This approach has particular potential in psychology, where students could use SMS messaging as a way of responding in simple psychology experiments or demonstrations. We describe a simple architecture for an SMS-based responding, using an SMS-to-HTTP message relay service, and a PHP/MySQL input-output handler. We describe briefly two experiments we have run using the system. The first experiment examined anchoring effects in an SMS-based auction. The second experiment examined delay discounting, with participants indicating their intertemporal preferences using SMS. Finally, we evaluate the feedback we obtained from students about the practical and conceptual issues surrounding text-message-based responding

    Dynamic Virtual Page-based Flash Translation Layer with Novel Hot Data Identification and Adaptive Parallelism Management

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    Solid-state disks (SSDs) tend to replace traditional motor-driven hard disks in high-end storage devices in past few decades. However, various inherent features, such as out-of-place update [resorting to garbage collection (GC)] and limited endurance (resorting to wear leveling), need to be reduced to a large extent before that day comes. Both the GC and wear leveling fundamentally depend on hot data identification (HDI). In this paper, we propose a hot data-aware flash translation layer architecture based on a dynamic virtual page (DVPFTL) so as to improve the performance and lifetime of NAND flash devices. First, we develop a generalized dual layer HDI (DL-HDI) framework, which is composed of a cold data pre-classifier and a hot data post-identifier. Those can efficiently follow the frequency and recency of information access. Then, we design an adaptive parallelism manager (APM) to assign the clustered data chunks to distinct resident blocks in the SSD so as to prolong its endurance. Finally, the experimental results from our realized SSD prototype indicate that the DVPFTL scheme has reliably improved the parallelizability and endurance of NAND flash devices with improved GC-costs, compared with related works.Peer reviewe

    An architecture for distributed ledger-based M2M auditing for Electric Autonomous Vehicles

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    Electric Autonomous Vehicles (EAVs) promise to be an effective way to solve transportation issues such as accidents, emissions and congestion, and aim at establishing the foundation of Machine-to-Machine (M2M) economy. For this to be possible, the market should be able to offer appropriate charging services without involving humans. The state-of-the-art mechanisms of charging and billing do not meet this requirement, and often impose service fees for value transactions that may also endanger users and their location privacy. This paper aims at filling this gap and envisions a new charging architecture and a billing framework for EAV which would enable M2M transactions via the use of Distributed Ledger Technology (DLT)

    Powertrace: Network-level Power Profiling for Low-power Wireless Networks

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    Low-power wireless networks are quickly becoming a critical part of our everyday infrastructure. Power consumption is a critical concern, but power measurement and estimation is a challenge. We present Powertrace, which to the best of our knowledge is the first system for network-level power profiling of low-power wireless systems. Powertrace uses power state tracking to estimate system power consumption and a structure called energy capsules to attribute energy consumption to activities such as packet transmissions and receptions. With Powertrace, the power consumption of a system can be broken down into individual activities which allows us to answer questions such as “How much energy is spent forwarding packets for node X?”, “How much energy is spent on control traffic and how much on critical data?”, and “How much energy does application X account for?”. Experiments show that Powertrace is accurate to 94% of the energy consumption of a device. To demonstrate the usefulness of Powertrace, we use it to experimentally analyze the power behavior of the proposed IETF standard IPv6 RPL routing protocol and a sensor network data collection protocol. Through using Powertrace, we find the highest power consumers and are able to reduce the power consumption of data collection with 24%. It is our hope that Powertrace will help the community to make empirical energy evaluation a widely used tool in the low-power wireless research community toolbox

    User-centered development of a Virtual Research Environment to support collaborative research events

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    This paper discusses the user-centred development process within the Collaborative Research Events on the Web (CREW) project, funded under the JISC Virtual Research Environments (VRE) programme. After presenting the project, its aims and the functionality of the CREW VRE, we focus on the user engagement approach, grounded in the method of co-realisation. We describe the different research settings and requirements of our three embedded user groups and the respective activities conducted so far. Finally we elaborate on the main challenges of our user engagement approach and end with the project’s next steps
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