1,255 research outputs found

    Multistage interconnection networks : improved routing algorithms and fault tolerance

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    Multistage interconnection networks for use by multiprocessor systems are optimal in terms of the number of switching element, but the routing algorithms used to set up these networks are suboptimal in terms of time. The network set-up time and reliability are the major factors to affect the performance of multistage interconnection networks. This work improves routing on Benes and Clos networks as well as the fault tolerant capability. The permutation representation is examined as well as the Clos and Benes networks. A modified edge coloring algorithm is applied to the regular bipartite multigraph which represents a Clos network. The looping and parallel looping algorithms are examined and a modified Tree-Connected Computer is adopted to execute a bidirectional parallel looping algorithm for Benes networks. A new fault tolerant Clos network is presented

    Randomized permutation routing in multihop ad hoc networks with unknown destinations

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    A large variety of permutation routing protocols in a single-hop Network are known to day. Since they are single hop, there is always a wireless path connecting two nodes. One way to solve this problem in a multiple hop environment is to partition nodes into clusters, where a node in each cluster called clusterhead is responsible for the routing service. In this paper, we propose a clustering mechanism to perform permutation routing in multi-hop ad hoc Networks having p stations and in which n data items are saved. We first develop a clustering algorithm to partition stations into clusters. Secondly, we run a locally permutation routing to broadcast items to their local destinations in each group. Finally we use a multicast procedure to transmit outgoing items to their final cluster destination.1st IFIP International Conference on Ad-Hoc NetWorkingRed de Universidades con Carreras en Informática (RedUNCI

    Fault-tolerant interconnection networks for multiprocessor systems

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    Interconnection networks represent the backbone of multiprocessor systems. A failure in the network, therefore, could seriously degrade the system performance. For this reason, fault tolerance has been regarded as a major consideration in interconnection network design. This thesis presents two novel techniques to provide fault tolerance capabilities to three major networks: the Baseline network, the Benes network and the Clos network. First, the Simple Fault Tolerance Technique (SFT) is presented. The SFT technique is in fact the result of merging two widely known interconnection mechanisms: a normal interconnection network and a shared bus. This technique is most suitable for networks with small switches, such as the Baseline network and the Benes network. For the Clos network, whose switches may be large for the SFT, another technique is developed to produce the Fault-Tolerant Clos (FTC) network. In the FTC, one switch is added to each stage. The two techniques are described and thoroughly analyzed

    Algorithms in fault-tolerant CLOS networks

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