Modular multilevel converter with modified half-bridge submodule and arm filter for dc transmission systems with DC fault blocking capability

Although a modular multilevel converter (MMC) is universally accepted as a suitable converter topology for the high voltage dc transmission systems, its dc fault ride performance requires substantial improvement in order to be used in critical infrastructures such as transnational multi-terminal dc (MTDC) networks. Therefore, this paper proposes a modified submodule circuit for modular multilevel converter that offers an improved dc fault ride through performance with reduced semiconductor losses and enhanced control flexibility compared to that achievable with full-bridge submodules. The use of the proposed submodules allows MMC to retain its modularity; with semiconductor loss similar to that of the mixed submodules MMC, but higher than that of the half-bridge submodules. Besides dc fault blocking, the proposed submodule offers the possibility of controlling ac current in-feed during pole-to-pole dc short circuit fault, and this makes such submodule increasingly attractive and useful for continued operation of MTDC networks during dc faults. The aforesaid attributes are validated using simulations performed in MATLAB/SIMULINK, and substantiated experimentally using the proposed submodule topology on a 4-level small-scale MMC prototype

Full Bridge MMC Converter Optimal Design to HVDC Operational Requirements

This project is funded by RTE, Paris, FrancePeer reviewedPostprin

A New MMC Topology Which Decreases the Sub Module Voltage Fluctuations at Lower Switching Frequencies and Improves Converter Efficiency

Modular Multi-level inverters (MMCs) are becoming more common because of their suitability for applications in smart grids and multi-terminal HVDC transmission networks. The comparative study between the two classic topologies of MMC (AC side cascaded and DC side cascaded topologies) indicates some disadvantages which can affect their performance. The sub module voltage ripple and switching losses are one of the main issues and the reason for the appearance of the circulating current is sub module capacitor voltage ripple. Hence, the sub module capacitor needs to be large enough to constrain the voltage ripple when operating at lower switching frequencies. However, this is prohibitively uneconomical for the high voltage applications. There is always a trade off in MMC design between the switching frequency and sub module voltage ripple

Impact of submodule faults on the performance of modular multilevel converters

Modular multilevel converter (MMC) is well suited for high-power and medium-voltage applications. However, its performance is adversely affected by asymmetry that might be introduced by the failure of a limited number of submodules (SMs) or even by severe deviations in the values of SM capacitors and arm inductors, particularly when the number of SMs per arm is relatively low. Although a safe-failed operation is easily achieved through the incorporation of redundant SMs, the SMs' faults make MMC arms present unequal impedances, which leads to undesirable internal dynamics because of unequal power distribution between the arms. The severity of these undesirable dynamics varies with the implementation of auxiliary controllers that regulate the MMC internal dynamics. This paper studied the impact of SMs failure on the MMC internal dynamics performance, considering two implementations of internal dynamics control, including a direct control method for suppressing the fundamental component that may arise in the dc-link current. Performances of the presented and widely-appreciated conventional methods for regulating MMC internal dynamics were assessed under normal and SM fault conditions, using detailed time-domain simulations and considering both active and reactive power applications. The effectiveness of control methods is also verified by the experiment. Related trade-offs of the control methods are presented, whereas it is found that the adverse impact of SMs failure on MMC ac and dc side performances could be minimized with appropriate control countermeasures

Modified half-bridge modular multilevel converter for HVDC systems with DC fault ride-through capability

One of the main challenges of voltage source converter based HVDC systems is DC faults. In this paper, two different modified half-bridge modular multilevel converter topologies are proposed. The proposed converters offer a fault tolerant against the most severe pole-to-pole DC faults. The converter comprises three switches or two switches and 4 diodes in each cell, which can result in less cost and losses compared to the full-bridge modular multilevel converter. Converter structure and controls are presented including the converter modulation and capacitors balancing. MATLAB/SIMULINK simulations are carried out to verify converter operation in normal and faulty conditions

Analysis and hardware testing of cell capacitor discharge currents during DC faults in half-bridge modular multilevel converters

This paper focuses on the behaviour of the cell capacitor discharge currents during DC faults in half-bridge modular multilevel converters. Active switches, not designed for fault conditions, are tripped to minimize discharge currents effect on the semiconductor switches. Two levels of device protection are commonly in place; driver level protection monitoring collector-emitter voltage and overcurrent protection with feedback measurement and control. However, unavoidable tripping delay times, arising from factors such as sensor lags, controller sampling delays and hardware propagation delays, impact transient current shape and hence affect the selection of semiconductor device ratings as well as arm inductance. Analytical expressions are obtained for current slew rate, peak transient current and resultant I2t for the cell capacitor discharge current taking into account such delays. The study is backed by experimental testing on discharge of a 900V MMC capacitor