Advanced information processing system: The Army fault tolerant architecture conceptual study. Volume 2: Army fault tolerant architecture design and analysis

Described here is the Army Fault Tolerant Architecture (AFTA) hardware architecture and components and the operating system. The architectural and operational theory of the AFTA Fault Tolerant Data Bus is discussed. The test and maintenance strategy developed for use in fielded AFTA installations is presented. An approach to be used in reducing the probability of AFTA failure due to common mode faults is described. Analytical models for AFTA performance, reliability, availability, life cycle cost, weight, power, and volume are developed. An approach is presented for using VHSIC Hardware Description Language (VHDL) to describe and design AFTA's developmental hardware. A plan is described for verifying and validating key AFTA concepts during the Dem/Val phase. Analytical models and partial mission requirements are used to generate AFTA configurations for the TF/TA/NOE and Ground Vehicle missions

Deep Space Network information system architecture study

The purpose of this article is to describe an architecture for the Deep Space Network (DSN) information system in the years 2000-2010 and to provide guidelines for its evolution during the 1990s. The study scope is defined to be from the front-end areas at the antennas to the end users (spacecraft teams, principal investigators, archival storage systems, and non-NASA partners). The architectural vision provides guidance for major DSN implementation efforts during the next decade. A strong motivation for the study is an expected dramatic improvement in information-systems technologies, such as the following: computer processing, automation technology (including knowledge-based systems), networking and data transport, software and hardware engineering, and human-interface technology. The proposed Ground Information System has the following major features: unified architecture from the front-end area to the end user; open-systems standards to achieve interoperability; DSN production of level 0 data; delivery of level 0 data from the Deep Space Communications Complex, if desired; dedicated telemetry processors for each receiver; security against unauthorized access and errors; and highly automated monitor and control

Space Station Freedom data management system growth and evolution report

The Information Sciences Division at the NASA Ames Research Center has completed a 6-month study of portions of the Space Station Freedom Data Management System (DMS). This study looked at the present capabilities and future growth potential of the DMS, and the results are documented in this report. Issues have been raised that were discussed with the appropriate Johnson Space Center (JSC) management and Work Package-2 contractor organizations. Areas requiring additional study have been identified and suggestions for long-term upgrades have been proposed. This activity has allowed the Ames personnel to develop a rapport with the JSC civil service and contractor teams that does permit an independent check and balance technique for the DMS

A method for analyzing the performance aspects of the fault-tolerance mechanisms in FDDI

The ability of error recovery mechanisms to make the Fiber Distributed Data Interface (FDDI) satisfy real-time performance constraints in the presence of errors is analyzed. A complicating factor in these analyses is the rarity of the error occurrences, which makes direct simulation unattractive. Therefore, a fast simulation technique, called injection simulation, which makes it possible to analyze the performance of FDDI, including its fault tolerance behavior, was developed. The implementation of injection simulation for polling models of FDDI is discussed, along with simulation result

Advanced information processing system for advanced launch system: Avionics architecture synthesis

The Advanced Information Processing System (AIPS) is a fault-tolerant distributed computer system architecture that was developed to meet the real time computational needs of advanced aerospace vehicles. One such vehicle is the Advanced Launch System (ALS) being developed jointly by NASA and the Department of Defense to launch heavy payloads into low earth orbit at one tenth the cost (per pound of payload) of the current launch vehicles. An avionics architecture that utilizes the AIPS hardware and software building blocks was synthesized for ALS. The AIPS for ALS architecture synthesis process starting with the ALS mission requirements and ending with an analysis of the candidate ALS avionics architecture is described

Spacelab system analysis Marshall Avionics System Testbed (MAST)

A synopsis of the visits to avionics test facilities is presented. A list of recommendaions for the MAST facility is also included

Advanced information processing system: The Army fault tolerant architecture conceptual study. Volume 1: Army fault tolerant architecture overview

Digital computing systems needed for Army programs such as the Computer-Aided Low Altitude Helicopter Flight Program and the Armored Systems Modernization (ASM) vehicles may be characterized by high computational throughput and input/output bandwidth, hard real-time response, high reliability and availability, and maintainability, testability, and producibility requirements. In addition, such a system should be affordable to produce, procure, maintain, and upgrade. To address these needs, the Army Fault Tolerant Architecture (AFTA) is being designed and constructed under a three-year program comprised of a conceptual study, detailed design and fabrication, and demonstration and validation phases. Described here are the results of the conceptual study phase of the AFTA development. Given here is an introduction to the AFTA program, its objectives, and key elements of its technical approach. A format is designed for representing mission requirements in a manner suitable for first order AFTA sizing and analysis, followed by a discussion of the current state of mission requirements acquisition for the targeted Army missions. An overview is given of AFTA's architectural theory of operation

Design and implementation of high speed multimedia network.

by Yeung Chung Toa.Thesis (M.Phil.)--Chinese University of Hong Kong, 1994.Includes bibliographical references (leaves 63-[65]).Chapter 1 --- Introduction --- p.1Chapter 1.1 --- Bandwidth required by multimedia applications --- p.1Chapter 1.2 --- Real-time requirement --- p.2Chapter 1.3 --- Multicasting --- p.2Chapter 1.4 --- Other networks --- p.3Chapter 1.5 --- Overview of CUM LAUDE NET --- p.5Chapter 1.5.1 --- Protocols --- p.7Chapter 1.5.2 --- Network Services --- p.8Chapter 1.6 --- Scope of the Thesis --- p.9Chapter 2 --- Network Architecture --- p.11Chapter 2.1 --- CUM LAUDE NET Architectural Overview --- p.11Chapter 2.2 --- Level One Network Architecture --- p.12Chapter 2.3 --- Level-One Router --- p.14Chapter 2.3.1 --- packet forwarding --- p.14Chapter 2.3.2 --- packet insertion --- p.15Chapter 2.3.3 --- packet removal --- p.15Chapter 2.3.4 --- fault protection --- p.15Chapter 2.4 --- Hub --- p.16Chapter 2.5 --- Host & Network Interface Card --- p.17Chapter 3 --- Protocol --- p.19Chapter 3.1 --- Design Overview --- p.19Chapter 3.2 --- Layering --- p.20Chapter 3.3 --- "Segment, Datagram, and Packet Format" --- p.21Chapter 3.3.1 --- IP/VCI field --- p.23Chapter 3.4 --- Data Link --- p.23Chapter 3.4.1 --- byte format and data link synchronization --- p.23Chapter 3.4.2 --- access control byte --- p.24Chapter 3.4.3 --- packet/frame boundary --- p.26Chapter 3.5 --- Fast Packet Routing Protocol --- p.26Chapter 3.5.1 --- Level-2/Level-l Bridge/Router --- p.27Chapter 3.5.2 --- Level-1 Hub --- p.29Chapter 3.5.3 --- Local Host NIC --- p.29Chapter 3.6 --- Media Access Control Protocol I : ACTA --- p.30Chapter 3.7 --- Media Access Control Protocol II: Hub Polling --- p.34Chapter 3.8 --- Protocol Implementation on CUM LAUDE NET --- p.36Chapter 4 --- Hardware Implementation & Performance of Routers and NIC --- p.40Chapter 4.1 --- Functionality of Router --- p.40Chapter 4.2 --- Important Components Used in the Router Design --- p.43Chapter 4.2.1 --- TAXI Transmitter and Receiver --- p.43Chapter 4.2.2 --- First-In-First-Out Memory (FIFO) --- p.44Chapter 4.3 --- Design of Router --- p.45Chapter 4.3.1 --- Version 1 --- p.45Chapter 4.3.2 --- Version 2 --- p.47Chapter 4.3.3 --- Version 3 --- p.50Chapter 4.4 --- Lessons Learned from the High Speed Router Design --- p.57Chapter 5 --- Conclusion --- p.61Bibliography --- p.6

Spacelab system analysis: A study of communications systems for advanced launch systems

An analysis of the required performance of internal avionics data bases for future launch vehicles is presented. Suitable local area networks that can service these requirements are determined

Paper Session II-A - The Testability of Software for the Space Station Freedom Program

The Space Station Freedom Data Management System consists of state-of-the-art hardware and software technology that exceeds the capabilities of earlier test tools and methods used to verify and certify man-rated space systems. New technologies and techniques are being developed to meet these challenges