Energy-efficient wireless communication

In this chapter we present an energy-efficient highly adaptive network interface architecture and a novel data link layer protocol for wireless networks that provides Quality of Service (QoS) support for diverse traffic types. Due to the dynamic nature of wireless networks, adaptations in bandwidth scheduling and error control are necessary to achieve energy efficiency and an acceptable quality of service. In our approach we apply adaptability through all layers of the protocol stack, and provide feedback to the applications. In this way the applications can adapt the data streams, and the network protocols can adapt the communication parameters

Enabling Parallel Wireless Communication in Mobile Robot Teams

Wireless inter-robot communication enables robot teams to cooperatively solve complex problems that cannot be addressed by a single robot. Applications for cooperative robot teams include search and rescue, exploration and surveillance. Communication is one of the most important components in future autonomous robot systems and is essential for core functions such as inter-robot coordination, neighbour discovery and cooperative control algorithms. In environments where communication infrastructure does not exist, decentralised multi-hop networks can be constructed using only the radios on-board each robot. These are known as wireless mesh networks (WMNs). However existing WMNs have limited capacity to support even small robot teams. There is a need for WMNs where links act like dedicated point-to-point connections such as in wired networks. Addressing this problem requires a fundamentally new approach to WMN construction and this thesis is the first comprehensive study in the multi-robot literature to address these challenges. In this thesis, we propose a new class of communication systems called zero mutual interference (ZMI) networks that are able to emulate the point-to-point properties of a wired network over a WMN implementation. We instantiate the ZMI network using a multi-radio multi-channel architecture that autonomously adapts its topology and channel allocations such that all network edges communicate at the full capacity of the radio hardware. We implement the ZMI network on a 100-radio testbed with up to 20-individual nodes and verify its theoretical properties. Mobile robot experiments also demonstrate these properties are practically achievable. The results are an encouraging indication that the ZMI network approach can facilitate the communication demands of large cooperative robot teams deployed in practical problems such as data pipe-lining, decentralised optimisation, decentralised data fusion and sensor networks

Parallel and Distributed Computing

The 14 chapters presented in this book cover a wide variety of representative works ranging from hardware design to application development. Particularly, the topics that are addressed are programmable and reconfigurable devices and systems, dependability of GPUs (General Purpose Units), network topologies, cache coherence protocols, resource allocation, scheduling algorithms, peertopeer networks, largescale network simulation, and parallel routines and algorithms. In this way, the articles included in this book constitute an excellent reference for engineers and researchers who have particular interests in each of these topics in parallel and distributed computing

Space Station Furnace Facility. Volume 2: Requirements Definition and Conceptual Design Study. Appendix 3: Environment Analysis

A Preliminary Safety Analysis (PSA) is being accomplished as part of the Space Station Furnace Facility (SSFF) contract. This analysis is intended to support SSFF activities by analyzing concepts and designs as they mature to develop essential safety requirements for inclusion in the appropriate specifications, and designs, as early as possible. In addition, the analysis identifies significant safety concerns that may warrant specific trade studies or design definition, etc. The analysis activity to date concentrated on hazard and hazard cause identification and requirements development with the goal of developing a baseline set of detailed requirements to support trade study, specifications development, and preliminary design activities. The analysis activity will continue as the design and concepts mature. Section 2 defines what was analyzed, but it is likely that the SSFF definitions will undergo further changes. The safety analysis activity will reflect these changes as they occur. The analysis provides the foundation for later safety activities. The hazards identified will in most cases have Preliminary Design Review (PDR) applicability. The requirements and recommendations developed for each hazard will be tracked to ensure proper and early resolution of safety concerns

Reconfigurable remote nodes for hybrid passive optical networks

Mestrado em Engenharia Electrónica e TelecomunicaçõesO presente documento tem por objectivo demonstrar, analisar e optimizar nós remotos passivos para redes ópticas passivas baseadas numa topologia de anel de dupla fibra com multiplexagem no comprimento de onda onde estão penduradas árvores mono fibra baseadas na multiplexagem no tempo. A rede ‘Scalable Advanced Ring-based passive Dense Access Network Architecture’ (SARDANA) baseada nesta topologia é apresentada e demonstrada. Na rede SARDANA a interligação entre o anel e as árvores é realizada pelo intermédio de um nó especial denominado de nó remoto. Esse nó remoto é um elemento fundamental para o funcionamento, resiliência e escalabilidade da rede. Neste documento são apresentadas e comparadas diferentes topologias para a implementação desse nó remoto. É também apresentada a reconfigurabilidade remota desses mesmos nós remotos através de módulos de conversão energética e controlo, implementada nos nós remotos. Um factor importante para a optimização dos nós remotos é a amplificação remota realizada por intermédio de fibras dopadas de érbio pelo que o seu estudo é também apresentado. Finalmente é demonstrado um protótipo de um nó remotamente reconfigurado e eficiente. ABSTRACT: The objective of this document is to demonstrate, analyze and optimize remote nodes for passive optical networks based on double fiber ring multiplexed in wavelength connected to single fiber trees multiplexed in time. The network ‘Scalable Advanced Ring-based passive Dense Access Network Architecture’ (SARDANA) based on this topology is presented and demonstrated. In the SARDANA network the interconnection between the ring and the trees is done by means of a special node, the remote node. This node is a fundamental element to the operation, resiliency and scalability of the network. This document presents and compares different topologies to the implementation of the remote node. Remotely reconfigurability of the remote nodes is also demonstrated by means of optical conversion and control modules. An important factor to the optimization of the remote nodes is the remote amplification done by means of erbium doped fibers being presented the analysis of the amplifier. Finally is demonstrated a prototype of a node remotely reconfigured and efficient

A high speed fault-tolerant multimedia network and connectionless gateway for ATM networks.

by Patrick Lam Sze Fan.Thesis (M.Phil.)--Chinese University of Hong Kong, 1997.Includes bibliographical references (leaves 163-[170]).Chapter 1 --- Introduction --- p.1Chapter 2 --- Fault-tolerant CUM LAUDE NET --- p.7Chapter 2.1 --- Overview of CUM LAUDE NET --- p.7Chapter 2.2 --- Network architecture of CUM LAUDE NET --- p.8Chapter 2.3 --- Design of Router-node --- p.10Chapter 2.3.1 --- Architecture of the Router-node --- p.10Chapter 2.3.2 --- Buffers Arrangement of the Router-node --- p.12Chapter 2.3.3 --- Buffer transmission policies --- p.13Chapter 2.4 --- Protocols of CUM LAUDE NET --- p.14Chapter 2.5 --- Frame Format of CUM LAUDE NET --- p.15Chapter 2.6 --- Fault-tolerant (FT) and Auto-healing (AH) algorithms --- p.16Chapter 2.6.1 --- Overview of the algorithms --- p.16Chapter 2.6.2 --- Network Failure Scenarios --- p.18Chapter 2.6.3 --- Design and Implementation of the Fault Tolerant Algorithm --- p.19Chapter 2.6.4 --- Design and Implementation of the Auto Healing Algorithm --- p.26Chapter 2.6.5 --- Network Management Signals and Restoration Times --- p.27Chapter 2.6.6 --- Comparison of fault-tolerance features of other networks with the CUM LAUDE NET --- p.31Chapter 2.7 --- Chapter Summary --- p.31Chapter 3 --- Overview of the Asynchronous Transfer Mode (ATM) --- p.33Chapter 3.1 --- Introduction --- p.33Chapter 3.2 --- ATM Network Interfaces --- p.34Chapter 3.3 --- ATM Virtual Connections --- p.35Chapter 3.4 --- ATM Cell Format --- p.36Chapter 3.5 --- ATM Address Formats --- p.36Chapter 3.6 --- ATM Protocol Reference Model --- p.38Chapter 3.6.1 --- The ATM Layer --- p.39Chapter 3.6.2 --- The ATM Adaptation Layer --- p.39Chapter 3.7 --- ATM Signalling --- p.44Chapter 3.7.1 --- ATM Signalling Messages and Call Setup Procedures --- p.45Chapter 3.8 --- Interim Local Management Interface (ILMI) --- p.47Chapter 4 --- Issues of Connectionless Gateway --- p.49Chapter 4.1 --- Introduction --- p.49Chapter 4.2 --- The Issues --- p.50Chapter 4.3 --- ATM Internetworking --- p.51Chapter 4.3.1 --- LAN Emulation --- p.52Chapter 4.3.2 --- IP over ATM --- p.53Chapter 4.3.3 --- Comparing IP over ATM and LAN Emulation --- p.59Chapter 4.4 --- Connection Management --- p.61Chapter 4.4.1 --- The Indirect Approach --- p.62Chapter 4.4.2 --- The Direct Approach --- p.63Chapter 4.4.3 --- Comparing the two approaches --- p.64Chapter 4.5 --- Protocol Conversion --- p.65Chapter 4.5.1 --- Selection of Protocol Converter --- p.68Chapter 4.6 --- Packet Forwarding Modes --- p.68Chapter 4.7 --- Bandwidth Assignment --- p.70Chapter 4.7.1 --- Bandwidth Reservation --- p.71Chapter 4.7.2 --- Fast Bandwidth Reservation --- p.72Chapter 4.7.3 --- Bandwidth Advertising --- p.72Chapter 4.7.4 --- Bandwidth Advertising with Cell Drop Detection --- p.73Chapter 4.7.5 --- Bandwidth Allocation on Source Demand --- p.73Chapter 4.7.6 --- The Common Problems --- p.74Chapter 5 --- Design and Implementation of the Connectionless Gateway --- p.77Chapter 5.1 --- Introduction --- p.77Chapter 5.1.1 --- Functions Definition of Connectionless Gateway --- p.79Chapter 5.2 --- Hardware Architecture of the Connectionless Gateway --- p.79Chapter 5.2.1 --- Imposed Limitations --- p.82Chapter 5.3 --- Software Architecture of the Connectionless Gateway --- p.83Chapter 5.3.1 --- TCP/IP Internals --- p.84Chapter 5.3.2 --- ATM on Linux --- p.85Chapter 5.4 --- Network Architecture --- p.88Chapter 5.4.1 --- IP Addresses Assignment --- p.90Chapter 5.5 --- Internal Structure of Connectionless Gateway --- p.90Chapter 5.5.1 --- Protocol Stacks of the Gateway --- p.90Chapter 5.5.2 --- Gateway Operation by Example --- p.93Chapter 5.5.3 --- Routing Table Maintenance --- p.97Chapter 5.6 --- Additional Features --- p.105Chapter 5.6.1 --- Priority Output Queues System --- p.105Chapter 5.6.2 --- Gateway Performance Monitor --- p.112Chapter 5.7 --- Setup an Operational ATM LAN --- p.117Chapter 5.7.1 --- SVC Connections --- p.117Chapter 5.7.2 --- PVC Connections --- p.119Chapter 5.8 --- Application of the Connectionless Gateway --- p.120Chapter 6 --- Performance Measurement of the Connectionless Gateway --- p.121Chapter 6.1 --- Introduction --- p.121Chapter 6.2 --- Experimental Setup --- p.121Chapter 6.3 --- Measurement Tools of the Experiments --- p.123Chapter 6.4 --- Descriptions of the Experiments --- p.124Chapter 6.4.1 --- Log Files --- p.125Chapter 6.5 --- UDP Control Rate Test --- p.126Chapter 6.5.1 --- Results and analysis of the UDP Control Rate Test --- p.127Chapter 6.6 --- UDP Maximum Rate Test --- p.138Chapter 6.6.1 --- Results and analysis of the UDP Maximum Rate Test --- p.138Chapter 6.7 --- TCP Maximum Rate Test --- p.140Chapter 6.7.1 --- Results and analysis of the TCP Maximum Rate Test --- p.140Chapter 6.8 --- Request/Response Test --- p.144Chapter 6.8.1 --- Results and analysis of the Request/Response Test --- p.144Chapter 6.9 --- Priority Queue System Verification Test --- p.149Chapter 6.9.1 --- Results and analysis of the Priority Queue System Verifi- cation Test --- p.150Chapter 6.10 --- Other Observations --- p.153Chapter 6.11 --- Solutions to Improve the Performance --- p.154Chapter 6.12 --- Future Development --- p.157Chapter 7 --- Conclusion --- p.158Bibliography --- p.163A List of Publications --- p.17

Verkkoliikenteen hajauttaminen rinnakkaisprosessoitavaksi ohjelmoitavan piirin avulla

The expanding diversity and amount of traffic in the Internet requires increasingly higher performing devices for protecting our networks against malicious activities. The computational load of these devices may be divided over multiple processing nodes operating in parallel to reduce the computation load of a single node. However, this requires a dedicated controller that can distribute the traffic to and from the nodes at wire-speed. This thesis concentrates on the system topologies and on the implementation aspects of the controller. A field-programmable gate array (FPGA) device, based on a reconfigurable logic array, is used for implementation because of its integrated circuit like performance and high-grain programmability. Two hardware implementations were developed; a straightforward design for 1-gigabit Ethernet, and a modular, highly parameterizable design for 10-gigabit Ethernet. The designs were verified by simulations and synthesizable testbenches. The designs were synthesized on different FPGA devices while varying parameters to analyze the achieved performance. High-end FPGA devices, such as Altera Stratix family, met the target processing speed of 10-gigabit Ethernet. The measurements show that the controller's latency is comparable to a typical switch. The results confirm that reconfigurable hardware is the proper platform for low-level network processing where the performance is prioritized over other features. The designed architecture is versatile and adaptable to applications expecting similar characteristics.Internetin edelleen lisääntyvä ja monipuolistuva liikenne vaatii entistä tehokkaampia laitteita suojaamaan tietoliikenneverkkoja tunkeutumisia vastaan. Tietoliikennelaitteiden kuormaa voidaan jakaa rinnakkaisille yksiköille, jolloin yksittäisen laitteen kuorma pienenee. Tämä kuitenkin vaatii erityisen kontrolloijan, joka kykenee hajauttamaan liikennettä yksiköille linjanopeudella. Tämä tutkimus keskittyy em. kontrolloijan järjestelmätopologioiden tutkimiseen sekä kontrolloijan toteuttamiseen ohjelmoitavalla piirillä, kuten kenttäohjelmoitava järjestelmäpiiri (eng. field programmable gate-array, FPGA). Kontrolloijasta tehtiin yksinkertainen toteutus 1-gigabitin Ethernet-verkkoihin sekä modulaarinen ja parametrisoitu toteutus 10-gigabitin Ethernet-verkkoihin. Toteutukset verifioitiin simuloimalla sekä käyttämällä syntetisoituvia testirakenteita. Toteutukset syntetisoitiin eri FPGA-piireille vaihtelemalla samalla myös toteutuksen parametrejä. Tehokkaimmat FPGA-piirit, kuten Altera Stratix -piirit, saavuttivat 10-gigabitin prosessointivaatimukset. Mittaustulokset osoittavat, että kontrollerin vasteaika ei poikkea tavallisesta verkkokytkimestä. Työn tulokset vahvistavat käsitystä, että ohjelmoitavat piirit soveltuvat hyvin verkkoliikenteen matalantason prosessointiin, missä vaaditaan ensisijaisesti suorituskykyä. Suunniteltu arkkitehtuuri on monipuolinen ja soveltuu joustavuutensa ansiosta muihin samantyyppiseen sovelluksiin