DC fault isolation study of bidirectional dual active bridge DC/DC converter for DC transmission grid application

Fast isolation and detection of DC faults is currently a limiting factor in high power DC transmission grid development. Recent research has shown that the role of DC/DC converters is becoming increasingly important in solving various DC grid challenges such as voltage stepping, galvanic isolation and power regulation. This paper focuses on an additional important feature of bidirectional dual active bridge (DAB) DC-DC converters which make it attractive for future DC grids; it's inherent fault isolation capability which does not need control intervention to limit fault current in case of the most severe DC faults. Detailed analytical, simulation and experimental study are performed by subjecting the converter to DC short circuit faults at its DC voltage terminals. The results obtained have shown significant advantage of DAB where fault current is less than rated current during the fault duration. Thus no control action is necessary from the non-faulted bridge to limit fault current and no external DC circuit breakers are required. This advantage makes DAB converter feasible for DC grid integration

An On-line Diagnostic Method for Open-circuit Switch Faults in NPC Multilevel Converters

On-line condition monitoring is of paramount importance for multilevel converters used in safety-critical applications. A novel on-line diagnostic method for detecting open-circuit switch faults in neutral-point-clamped (NPC) multilevel converters is introduced in this paper. The principle of this method is based on monitoring the abnormal variation of the dc-bus neutral-point current in combination with the existing information on instantaneous switching states and phase currents. Advantages of this method include simpler implementation and faster detection speed compared to other existing diagnostic methods in the literature. In this method, only one additional current sensor is required for measuring the dc-bus neutral-point current, therefore the implementation cost is low. Simulation and experimental results based on a lab-scale 50 kVA adjustable speed drive (ASD) with a three-level NPC inverter validate the efficacy of this novel diagnostic method

Evaluation of a Local Fault Detection Algorithm for HVDC Systems

A great increase in the amount of energy generated from clean and renewable sources integrated in the electric power system is expected worldwide in the coming years. High Voltage Direct Current (HVDC) systems are seen as a promising alternative to the traditional Alternating Current (AC) systems for the expansion of the electric power system. However, to achieve this vision, there are some remaining challenges regarding HVDC systems which need to be solved. One of the main challenges is related to fault detection and location in HVDC grids. This paper reviews the main protection algorithms available and presents the evaluation of a local fault detection algorithm for DC faults in a multi-terminal Voltage Source Conversion (VSC) based HVDC grid. The paper analyses the influence of the DC voltage sampling frequency and the cable length in the performance of the algorithm. © 2019, European Association for the Development of Renewable Energy, Environment and Power Quality (EA4EPQ).The authors thank the support from the Spanish Ministry of Economy, Industry and Competitiveness (project ENE2016-79145-R AEI/FEDER, UE) and GISEL research group IT1083-16), as well as from the University of the Basque Country UPV/EHU (research group funding PPG17/23)

Health Condition Monitoring and Fault-Tolerant Operation of Adjustable Speed Drives

Adjustable speed drives (ASDs) have been extensively used in industrial applications over the past few decades because of their benefits of energy saving and control flexibilities. However, the wider penetration of ASD systems into industrial applications is hindered by the lack of health monitoring and fault-tolerant operation techniques, especially in safety-critical applications. In this dissertation, a comprehensive portfolio of health condition monitoring and fault-tolerant operation strategies is developed and implemented for multilevel neutral-point-clamped (NPC) power converters in ASDs. Simulations and experiments show that these techniques can improve power cycling lifetime of power transistors, on-line diagnosis of switch faults, and fault-tolerant capabilities.The first contribution of this dissertation is the development of a lifetime improvement Pulse Width Modulation (PWM) method which can significantly extend the power cycling lifetime of Insulated Gate Bipolar Transistors (IGBTs) in NPC inverters operating at low frequencies. This PWM method is achieved by injecting a zero-sequence signal with a frequency higher than that of the IGBT junction-to-case thermal time constants. This, in turn, lowers IGBT junction temperatures at low output frequencies. Thermal models, simulation and experimental verifications are carried out to confirm the effectiveness of this PWM method. As a second contribution of this dissertation, a novel on-line diagnostic method is developed for electronic switch faults in power converters. Targeted at three-level NPC converters, this diagnostic method can diagnose any IGBT faults by utilizing the information on the dc-bus neutral-point current and switching states. This diagnostic method only requires one additional current sensor for sensing the neutral-point current. Simulation and experimental results verified the efficacy of this diagnostic method.The third contribution consists of the development and implementation of a fault-tolerant topology for T-Type NPC power converters. In this fault-tolerant topology, one additional phase leg is added to the original T-Type NPC converter. In addition to providing a fault-tolerant solution to certain switch faults in the converter, this fault-tolerant topology can share the overload current with the original phase legs, thus increasing the overload capabilities of the power converters. A lab-scale 30-kVA ASD based on this proposed topology is implemented and the experimental results verified its benefits

Fully equipped half bridge building block for fast prototyping of switching power converters

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Protection strategy for multi-terminal DC networks with fault current blocking capability of converters

High voltage dc networks are a promising technology to flexibly transmit power over long distances. However, dc grid protection is still a major challenge. DC fault clearance can be mainly achieved with three devices. These are ac circuit breakers (ACCBs), dc circuit breakers (DCCBs) and converters with fault current blocking (FB) capability. In spite of their great operational advantages, FB converters have attracted less attention than ACCBs or DCCBs in dc protection research. To bridge this gap, this paper investigates a protection strategy for a multi-terminal dc (MTDC) network equipped with FB converters and fast dc disconnectors. A novel minimum opening protection approach fully based on local data is proposed. Digital simulations are carried out using PSCAD/EMTDC. Simulation results show that only the two fast dc disconnectors placed in a faulty link operate following a dc fault. These results have verified proposed ideas for the protection of MTDC networks

Fault current limiting and protection circuit for power electronics used in a Modular Converter

The thesis objective is to safeguard power electronics used in modular converter applications. A new fault current limiting and protection circuit is proposed. The system level fault mitigation assemblies take a long time to remove a fault and within this time the IGBTs used in the Flexible AC Transmission System (FACTS) application will undergo high thermal and mechanical stress. Exposure to such conditions over a prolonged period of time will reduce the device lifetime, which is one of the major reasons why power electronics are not very popular in utility applications. Modular converter approach will reduce the device ratings required to mitigate the fault at power electronics level. The fault current limiting and protection circuit is tested using PSPICE simulation tool. The test set up is simple comprising of two IGBTs, one which acts as device under test (DUT) and another which acts as switch regulating fault seen by DUT. The test voltage is 480 Volt and R-L is varied over a range of L – 20nanoHenry, 2microHenry, and 10microHenry and R – 20Ohm, 50Ohm, and 100Ohm. The fault current limiting (FCL) and protection circuit worked accurately in each of the cases described above, thereby safely turning OFF the device within the short circuit withstand capacity (10microseconds) of IGBTs. The FCL and protection circuit can mitigate both Hard Switched Fault and Fault Under Load seen by the IGBT during short circuit condition. The circuit developed is different from the conventional protection gate drives available in the market and there is the possibility of customizing it further for modular blocks

Coordination of MMCs with hybrid DC circuit breakers for HVDC grid protection

A high-voltage direct-current (HVDC) grid protection strategy to suppress dc fault currents and prevent overcurrent in the arms of modular multi-level converters (MMCs) is proposed in this paper. The strategy is based on the coordination of half-bridge (HB) MMCs and hybrid dc circuit breakers (DCCBs). This is achieved by allowing MMC submodules (SMs) to be temporarily bypassed prior to the opening of the DCCBs. Once the fault is isolated by the DCCBs, the MMCs will restore to normal operation. The performance of the proposed method is assessed and compared to when MMCs are blocked and when no corrective action is taken. To achieve this, an algorithm for fault detection and discrimination is used and its impact on MMC bypassing is discussed. To assess its effectiveness, the proposed algorithm is demonstrated in PSCAD/EMTDC using a four-terminal HVDC system. Simulation results show that the coordination of MMCs and DCCBs can significantly reduce dc fault current and the absorbed current energy by more than 70 and 90% respectively, while keeping MMC arm currents small