8,834 research outputs found

    Explicit Representation of Exception Handling in the Development of Dependable Component-Based Systems

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    Exception handling is a structuring technique that facilitates the design of systems by encapsulating the process of error recovery. In this paper, we present a systematic approach for incorporating exceptional behaviour in the development of component-based software. The premise of our approach is that components alone do not provide the appropriate means to deal with exceptional behaviour in an effective manner. Hence the need to consider the notion of collaborations for capturing the interactive behaviour between components, when error recovery involves more than one component. The feasibility of the approach is demonstrated in terms of the case study of the mining control system

    The Chameleon Architecture for Streaming DSP Applications

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    We focus on architectures for streaming DSP applications such as wireless baseband processing and image processing. We aim at a single generic architecture that is capable of dealing with different DSP applications. This architecture has to be energy efficient and fault tolerant. We introduce a heterogeneous tiled architecture and present the details of a domain-specific reconfigurable tile processor called Montium. This reconfigurable processor has a small footprint (1.8 mm2^2 in a 130 nm process), is power efficient and exploits the locality of reference principle. Reconfiguring the device is very fast, for example, loading the coefficients for a 200 tap FIR filter is done within 80 clock cycles. The tiles on the tiled architecture are connected to a Network-on-Chip (NoC) via a network interface (NI). Two NoCs have been developed: a packet-switched and a circuit-switched version. Both provide two types of services: guaranteed throughput (GT) and best effort (BE). For both NoCs estimates of power consumption are presented. The NI synchronizes data transfers, configures and starts/stops the tile processor. For dynamically mapping applications onto the tiled architecture, we introduce a run-time mapping tool

    Active fault tolerant control for nonlinear systems with simultaneous actuator and sensor faults

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    The goal of this paper is to describe a novel fault tolerant tracking control (FTTC) strategy based on robust fault estimation and compensation of simultaneous actuator and sensor faults. Within the framework of fault tolerant control (FTC) the challenge is to develop an FTTC design strategy for nonlinear systems to tolerate simultaneous actuator and sensor faults that have bounded first time derivatives. The main contribution of this paper is the proposal of a new architecture based on a combination of actuator and sensor Takagi-Sugeno (T-S) proportional state estimators augmented with proportional and integral feedback (PPI) fault estimators together with a T-S dynamic output feedback control (TSDOFC) capable of time-varying reference tracking. Within this architecture the design freedom for each of the T-S estimators and the control system are available separately with an important consequence on robust L₂ norm fault estimation and robust L₂ norm closed-loop tracking performance. The FTTC strategy is illustrated using a nonlinear inverted pendulum example with time-varying tracking of a moving linear position reference. Keyword

    Hybrid routing technique for a fault-tolerant, integrated information network

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    The evolutionary growth of the space station and the diverse activities onboard are expected to require a hierarchy of integrated, local area networks capable of supporting data, voice, and video communications. In addition, fault-tolerant network operation is necessary to protect communications between critical systems attached to the net and to relieve the valuable human resources onboard the space station of time-critical data system repair tasks. A key issue for the design of the fault-tolerant, integrated network is the development of a robust routing algorithm which dynamically selects the optimum communication paths through the net. A routing technique is described that adapts to topological changes in the network to support fault-tolerant operation and system evolvability
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