DCT Implementation on GPU

There has been a great progress in the field of graphics processors. Since, there is no rise in the speed of the normal CPU processors; Designers are coming up with multi-core, parallel processors. Because of their popularity in parallel processing, GPUs are becoming more and more attractive for many applications. With the increasing demand in utilizing GPUs, there is a great need to develop operating systems that handle the GPU to full capacity. GPUs offer a very efficient environment for many image processing applications. This thesis explores the processing power of GPUs for digital image compression using Discrete cosine transform

Variable Size 2D DCT with FPGA Implimentation

A lot of research are going on in the field of image processing algorithm. Compression enables throughput processing through transmission medium.A lot of research is going on in this field to have a highly efficient output. In this paper a co-simulation environment is for discrete co-sine transform is proposed which enables compression for different size of images provides facts approximately FPGA implementation for compression of an image using the Xilinx system Generator1 (XSG) for MATLAB. For using Xilinx system generator for an image processing minimizes the complexity in structural design also gives extra characteristic for hardware co-simulation2.The most easiest and reliable constructing block for compression system is DCT. Which may be completed the usage of specialized algorithms. Fast prototyping based on FPGA platform of the virtex-5 family is used to validate the operation of the defined DCT device