A novel hexagonal search algorithm for fast block matching motion estimation

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Improvement and optimization of H.264 video codec.

Tang, Kai Lam.Thesis (M.Phil.)--Chinese University of Hong Kong, 2007.Includes bibliographical references.Abstracts in English and Chinese.Acknowledgement --- p.iAbstract --- p.iiContents --- p.ivPublication List --- p.viiChapter Chapter 1 --- Introduction --- p.1-1Chapter 1.1 --- Video Coding --- p.1-1Chapter 1.1.1 --- Temporal prediction --- p.1-5Chapter 1.1.2 --- Transform Coding --- p.1-9Chapter 1.1.3 --- Quantization --- p.1-12Chapter 1.1.4 --- Entropy Coding --- p.1-14Chapter 1.2 --- H.264/MPEG-4 Part 10 --- p.1-15Chapter 1.2.1 --- Overview --- p.1-16Chapter 1.2.2 --- Intra Prediction --- p.1-19Chapter 1.2.3 --- Inter Prediction --- p.1-20Chapter 1.2.4 --- Transform and Quantization --- p.1-23Chapter 1.2.5 --- Entropy Coding --- p.1-25Chapter 1.2.6 --- Deblocking Filter --- p.1-29Chapter 1.3 --- Organization of the Thesis --- p.1-32Chapter 1.3.1 --- Review of Motion Estimation Techniques --- p.1-32Chapter 1.3.2 --- The Proposed Algorithms --- p.1-33Chapter 1.3.3 --- Optimization of the Codec --- p.1-34Chapter 1.4 --- Contributions --- p.1-35Chapter Chapter 2 --- Review of Motion Estimation Techniques --- p.2-1Chapter 2.1 --- Fast Full Search --- p.2-2Chapter 2.2 --- Hybrid Unsymmetrical-cross Multi-Hexagon-grid Search --- p.2-4Chapter 2.3 --- Center biased Fractional Pel Search --- p.2-6Chapter 2.4 --- Enhanced Predictive Zonal Search --- p.2-7Chapter Chapter 3 --- Enhancement Techniques for Intra Block Matching --- p.3-1Chapter 3.1 --- Introduction --- p.3-1Chapter 3.1.1 --- Fundamental Principles --- p.3-1Chapter 3.1.2 --- Variable Block Size Intra Block Matching --- p.3-3Chapter 3.2 --- Proposed Techniques --- p.3-5Chapter 3.2.1 --- Padding --- p.3-5Chapter 3.2.2 --- Modes --- p.3-9Chapter 3.2.3 --- Performance Enhancement Tools --- p.3-12Chapter 3.2.3.1 --- Multiple Best Matches --- p.3-12Chapter 3.2.3.2 --- Adaptive Integer and Sub-pixel Intra Block Matching --- p.3-13Chapter 3.2.4 --- Pseudo Intra Block Matching --- p.3-14Chapter 3.3 --- Proposed Fast Algorithms --- p.3-16Chapter 3.3.1 --- Fast Intra Block Matching Decision --- p.3-16Chapter 3.3.2 --- Skipping some Intra Block Matching Processes --- p.3-18Chapter 3.3.3 --- Early Termination --- p.3-19Chapter 3.3.4 --- SAD Reuse Techniques --- p.3-21Chapter 3.4 --- Experimental Results --- p.3-22Chapter Chapter 4 --- Enhanced SAD Reuse Fast Motion Estimation --- p.4-1Chapter 4.1 --- Introduction --- p.4-1Chapter 4.2 --- Proposed Fast Motion Estimation Algorithm --- p.4-3Chapter 4.2.1 --- Best Initial Motion Vector --- p.4-3Chapter 4.2.2 --- Initial Search Pattern --- p.4-4Chapter 4.2.3 --- Initial Search Process and Search Pattern Improvement Process --- p.4-7Chapter 4.2.3.1 --- BISPCSP Motion Estimation or Refinement Process Decision --- p.4-8Chapter 4.2.3.2 --- ISP Motion Estimation or Refinement Process Decision --- p.4-9Chapter 4.2.4 --- Motion Estimation Process and Refinement Process --- p.4-9Chapter 4.2.4.1 --- Motion Estimation Process --- p.4-9Chapter 4.2.4.2 --- Refinement Process --- p.4-11Chapter 4.2.5 --- Motion Estimation Skip Process for B Pictures --- p.4-12Chapter 4.3 --- Experimental Results --- p.4-13Chapter Chapter 5 --- Development of Real-Time H.264 Codec on Pocket PC --- p.5-1Chapter 5.1 --- Algorithmic Optimizations --- p.5-2Chapter 5.1.1 --- Fast Sub-Pixel Motion Estimation --- p.5-2Chapter 5.1.2 --- Interpolation --- p.5-5Chapter 5.1.2.1 --- Revision of Luma Interpolation --- p.5-5Chapter 5.1.2.2 --- Fast Interpolation --- p.5-8Chapter 5.1.3 --- Skipping Inverse ICT and Inverse Quantization Depends on Coded Block Pattern --- p.5-10Chapter 5. 2 --- Code Level Optimizations --- p.5-12Chapter 5.2.1 --- Merging Loops --- p.5-12Chapter 5.2.2 --- Moving Independent Code outside the Loop --- p.5-13Chapter 5.2.3 --- Unrolling Loops --- p.5-14Chapter 5.3 --- Experimental Results --- p.5-16Chapter 5.4 --- Applications --- p.5-26Chapter Chapter 6 --- Conclusions and Future Development --- p.6-1Chapter 6.1 --- Conclusions --- p.6-1Chapter 6.1.1 --- Enhancement Techniques for Intra Block Matching --- p.6-1Chapter 6.1.2 --- Enhanced SAD Reuse Fast Motion Estimation --- p.6-1Chapter 6.1.3 --- Development of Real-Time H.264 Codec on Pocket PC --- p.6-2Chapter 6.2 --- Future Development --- p.6-3Bibliography --- p.

Motion estimation and CABAC VLSI co-processors for real-time high-quality H.264/AVC video coding

Real-time and high-quality video coding is gaining a wide interest in the research and industrial community for different applications. H.264/AVC, a recent standard for high performance video coding, can be successfully exploited in several scenarios including digital video broadcasting, high-definition TV and DVD-based systems, which require to sustain up to tens of Mbits/s. To that purpose this paper proposes optimized architectures for H.264/AVC most critical tasks, Motion estimation and context adaptive binary arithmetic coding. Post synthesis results on sub-micron CMOS standard-cells technologies show that the proposed architectures can actually process in real-time 720 × 480 video sequences at 30 frames/s and grant more than 50 Mbits/s. The achieved circuit complexity and power consumption budgets are suitable for their integration in complex VLSI multimedia systems based either on AHB bus centric on-chip communication system or on novel Network-on-Chip (NoC) infrastructures for MPSoC (Multi-Processor System on Chip