Thermal modeling and design optimization of PCB vias and pads

Miniature power semiconductor devices mounted on printed circuit boards (PCBs) are normally cooled by means of PCB vias, copper pads, and/or heatsinks. Various reference PCB thermal designs have been provided by semiconductor manufacturers and researchers. However, the recommendations are not optimal, and there are some discrepancies among them, which may confuse electrical engineers. This paper aims to develop analytical thermal resistance models for PCB vias and pads, and further to obtain the optimal design for thermal resistance minimization. Firstly, the PCB via array is thermally modeled in terms of multiple design parameters. A systematic parametric analysis leads to an optimal trajectory for the via diameter at different PCB specifications. Then an axisymmetric thermal resistance model is developed for PCB thermal pads where the heat conduction, convection and radiation all exist; due to the interdependence between the conductive/radiative heat transfer coefficients and the board temperatures, an algorithm is proposed to fast obtain the board-ambient thermal resistance and to predict the semiconductor junction temperature. Finally, the proposed thermal models and design optimization algorithms are verified by computational fluid dynamics (CFD) simulations and experimental measurements

Optimal design of chemoepitaxial guideposts for directed self-assembly of block copolymer systems using an inexact-Newton algorithm

Directed self-assembly (DSA) of block-copolymers (BCPs) is one of the most promising developments in the cost-effective production of nanoscale devices. The process makes use of the natural tendency for BCP mixtures to form nanoscale structures upon phase separation. The phase separation can be directed through the use of chemically patterned substrates to promote the formation of morphologies that are essential to the production of semiconductor devices. Moreover, the design of substrate pattern can formulated as an optimization problem for which we seek optimal substrate designs that effectively produce given target morphologies. In this paper, we adopt a phase field model given by a nonlocal Cahn--Hilliard partial differential equation (PDE) based on the minimization of the Ohta--Kawasaki free energy, and present an efficient PDE-constrained optimization framework for the optimal design problem. The design variables are the locations of circular- or strip-shaped guiding posts that are used to model the substrate chemical pattern. To solve the ensuing optimization problem, we propose a variant of an inexact Newton conjugate gradient algorithm tailored to this problem. We demonstrate the effectiveness of our computational strategy on numerical examples that span a range of target morphologies. Owing to our second-order optimizer and fast state solver, the numerical results demonstrate five orders of magnitude reduction in computational cost over previous work. The efficiency of our framework and the fast convergence of our optimization algorithm enable us to rapidly solve the optimal design problem in not only two, but also three spatial dimensions.Comment: 35 Pages, 17 Figure

Optimal edge termination for high oxide reliability aiming 10kV SiC n-IGBTs

The edge termination design strongly affects the ability of a power device to support the desired voltage and its reliable operation. In this paper we present three appropriate termination designs for 10kV n-IGBTs which achieve the desired blocking requirement without the need for deep and expensive implantations. Thus, they improve the ability to fabricate, minimise the cost and reduce the lattice damage due to the high implantation energy. The edge terminations presented are optimised both for achieving the widest immunity to dopant activation and to minimise the electric field at the oxide. Thus, they ensure the long-term reliability of the device. This work has shown that the optimum design for blocking voltage and widest dose window does not necessarily give the best design for reliability. Further, it has been shown that Hybrid Junction Termination Extension structure with Space Modulated Floating Field Rings can give the best result of very high termination efficiency, as high as 99%, the widest doping variation immunity and the lowest electric field in the oxide

Investigation of FACTS devices to improve power quality in distribution networks

Flexible AC transmission system (FACTS) technologies are power electronic solutions that improve power transmission through enhanced power transfer volume and stability, and resolve quality and reliability issues in distribution networks carrying sensitive equipment and non-linear loads. The use of FACTS in distribution systems is still in its infancy. Voltages and power ratings in distribution networks are at a level where realistic FACTS devices can be deployed. Efficient power converters and therefore loss minimisation are crucial prerequisites for deployment of FACTS devices. This thesis investigates high power semiconductor device losses in detail. Analytical closed form equations are developed for conduction loss in power devices as a function of device ratings and operating conditions. These formulae have been shown to predict losses very accurately, in line with manufacturer data. The developed formulae enable circuit designers to quickly estimate circuit losses and determine the sensitivity of those losses to device voltage and current ratings, and thus select the optimal semiconductor device for a specific application. It is shown that in the case of majority carrier devices (such as power MOSFETs), the conduction power loss (at rated current) increases linearly in relation to the varying rated current (at constant blocking voltage), but is a square root of the variable blocking voltage when rated current is fixed. For minority carrier devices (such as a pin diode or IGBT), a similar relationship is observed for varying current, however where the blocking voltage is altered, power losses are derived as a square root with an offset (from the origin). Finally, this thesis conducts a power loss-oriented evaluation of cascade type multilevel converters suited to reactive power compensation in 11kV and 33kV systems. The cascade cell converter is constructed from a series arrangement of cell modules. Two prospective structures of cascade type converters were compared as a case study: the traditional type which uses equal-sized cells in its chain, and a second with a ternary relationship between its dc-link voltages. Modelling (at 81 and 27 levels) was carried out under steady state conditions, with simplified models based on the switching function and using standard circuit simulators. A detailed survey of non punch through (NPT) and punch through (PT) IGBTs was completed for the purpose of designing the two cascaded converters. Results show that conduction losses are dominant in both types of converters in NPT and PT IGBTs for 11kV and 33kV systems. The equal-sized converter is only likely to be useful in one case (27-levels in the 33kV system). The ternary-sequence converter produces lower losses in all other cases, and this is especially noticeable for the 81-level converter operating in an 11kV network

A novel two-section tunable discrete mode Fabry-PÉrot laser exhibiting nanosecond wavelength switching

A novel widely tunable laser diode is proposed and demonstrated. Mode selection occurs by etching perturbing slots into the laser ridge. A two-section device is realized with different slot patterns in each section allowing Vernier tuning. The laser operates at 1.3 mum and achieves a maximum output power of 10 mW. A discontinuous tuning range of 30 nm was achieved with a side mode suppression greater than 30 dB. Wavelength switching times of approximately 1.5 ns between a number of wavelength channels separated by 7 nm have been demonstrated

Accurate Measurement of Dynamic on-State Resistances of GaN Devices under Reverse and Forward Conduction in High Frequency Power Converter

Because of trapped charges in GaN transistor structure, device dynamic ON-state resistance RDSon is increased when it is operated in high frequency switched power converters, in which device is possibly operated by zero voltage switching (ZVS) to reduce its turn-ON switching losses. When GaN transistor finishes ZVS during one switching period, device has been operated under both reverse and forward conduction. Therefore its dynamic RDSon under both conduction modes needs to be carefully measured to understand device power losses. For this reason, a measurement circuit with simple structure and fast dynamic response is proposed to characterise device reverse and forward RDSon. In order to improve measurement sensitivity when device switches at high frequency, a trapezoidal current mode is proposed to measure device RDSon under almost constant current, which resolves measurement sensitivity issues caused by unavoidable measurement circuit parasitic inductance and measurement probes deskew in conventional device characterisation method by triangle current mode. Proposed measurement circuit and measurement method is then validated by first characterising a SiC-MOSFET with constant RDSon. Then, the comparison on GaN-HEMT dynamic RDSon measurement results demonstrates the improved accuracy of proposed trapezoidal current mode over conventional triangle current mode when device switches at 1MHz

Limits on Fundamental Limits to Computation

An indispensable part of our lives, computing has also become essential to industries and governments. Steady improvements in computer hardware have been supported by periodic doubling of transistor densities in integrated circuits over the last fifty years. Such Moore scaling now requires increasingly heroic efforts, stimulating research in alternative hardware and stirring controversy. To help evaluate emerging technologies and enrich our understanding of integrated-circuit scaling, we review fundamental limits to computation: in manufacturing, energy, physical space, design and verification effort, and algorithms. To outline what is achievable in principle and in practice, we recall how some limits were circumvented, compare loose and tight limits. We also point out that engineering difficulties encountered by emerging technologies may indicate yet-unknown limits.Comment: 15 pages, 4 figures, 1 tabl

Enhanced thermionic-dominated photoresponse in graphene Schottky junctions

Vertical heterostructures of van der Waals materials enable new pathways to tune charge and energy transport characteristics in nanoscale systems. We propose that graphene Schottky junctions can host a special kind of photoresponse which is characterized by strongly coupled heat and charge flows that run vertically out of the graphene plane. This regime can be accessed when vertical energy transport mediated by thermionic emission of hot carriers overwhelms electron-lattice cooling as well as lateral diffusive energy transport. As such, the power pumped into the system is efficiently extracted across the entire graphene active area via thermionic emission of hot carriers into a semiconductor material. Experimental signatures of this regime include a large and tunable internal responsivity ${\cal R}$ with a non-monotonic temperature dependence. In particular, ${\cal R}$ peaks at electronic temperatures on the order of the Schottky potential $\phi$ and has a large upper limit ${\cal R} \le e/\phi$ ($e/\phi=10\,{\rm A/W}$ when $\phi = 100\,{\rm meV}$). Our proposal opens up new approaches for engineering the photoresponse in optically-active graphene heterostructures.Comment: 6 pages, 2 figure