Analysis of microstrip antennas by multilevel matrix decomposition algorithm

Integral equation methods (IE) are widely used in conjunction with Method of Moments (MoM) discretization for the numerical analysis of microstrip antennas. However, their application to large antenna arrays is difficult due to the fact that the computational requirements increase rapidly with the number of unknowns N. Several techniques have been proposed to reduce the computational cost of IE-MoM. The Multilevel Matrix Decomposition Algorithm (MLMDA) has been implemented in 3D for arbitrary perfectly conducting surfaces discretized in Rao, Wilton and Glisson linear triangle basis functions . This algorithm requires an operation count that is proportional to N·log2N. The performance of the algorithm is much better for planar or piece-wise planar objects than for general 3D problems, which makes the algorithm particularly well-suited for the analysis of microstrip antennas. The memory requirements are proportional to N·logN and very low. The main advantage of the MLMDA compared with other efficient techniques to solve integral equations is that it does not rely on specific mathematical properties of the Green's functions being used. Thus, we can apply the method to interesting configurations governed by special Green's functions like multilayered media. In fact, the MDA-MLMDA method can be used at the top of any existing MoM code. In this paper we present the application to the analysis of large printed antenna arrays.Peer ReviewedPostprint (published version

Interpolation-based parameterized model order reduction of delayed systems

Three-dimensional electromagnetic methods are fundamental tools for the analysis and design of high-speed systems. These methods often generate large systems of equations, and model order reduction (MOR) methods are used to reduce such a high complexity. When the geometric dimensions become electrically large or signal waveform rise times decrease, time delays must be included in the modeling. Design space optimization and exploration are usually performed during a typical design process that consequently requires repeated simulations for different design parameter values. Efficient performing of these design activities calls for parameterized model order reduction (PMOR) methods, which are able to reduce large systems of equations with respect to frequency and other design parameters of the circuit, such as layout or substrate features. We propose a novel PMOR method for neutral delayed differential systems, which is based on an efficient and reliable combination of univariate model order reduction methods, a procedure to find scaling and frequency shifting coefficients and positive interpolation schemes. The proposed scaling and frequency shifting coefficients enhance and improve the modeling capability of standard positive interpolation schemes and allow accurate modeling of highly dynamic systems with a limited amount of initial univariate models in the design space. The proposed method is able to provide parameterized reduced order models passive by construction over the design space of interest. Pertinent numerical examples validate the proposed PMOR approach

SIM-DSP: A DSP-Enhanced CAD Platform for Signal Integrity Macromodeling and Simulation

Macromodeling-Simulation process for signal integrity verifications has become necessary for the high speed circuit system design. This paper aims to introduce a “VLSI Signal Integrity Macromodeling and Simulation via Digital Signal Processing Techniques” framework (known as SIM-DSP framework), which applies digital signal processing techniques to facilitate the SI verification process in the pre-layout design phase. Core identification modules and peripheral (pre-/post-)processing modules have been developed and assembled to form a verification flow. In particular, a single-step discrete cosine transform truncation (DCTT) module has been developed for modeling-simulation process. In DCTT, the response modeling problem is classified as a signal compression problem, wherein the system response can be represented by a truncated set of non-pole based DCT bases, and error can be analyzed through Parseval’s theorem. Practical examples are given to show the applicability of our proposed framework

EIT Reconstruction Algorithms: Pitfalls, Challenges and Recent Developments

We review developments, issues and challenges in Electrical Impedance Tomography (EIT), for the 4th Workshop on Biomedical Applications of EIT, Manchester 2003. We focus on the necessity for three dimensional data collection and reconstruction, efficient solution of the forward problem and present and future reconstruction algorithms. We also suggest common pitfalls or ``inverse crimes'' to avoid.Comment: A review paper for the 4th Workshop on Biomedical Applications of EIT, Manchester, UK, 200

The Energy Conserving Particle-in-Cell Method

A new Particle-in-Cell (PIC) method, that conserves energy exactly, is presented. The particle equations of motion and the Maxwell's equations are differenced implicitly in time by the midpoint rule and solved concurrently by a Jacobian-free Newton Krylov (JFNK) solver. Several tests show that the finite grid instability is eliminated in energy conserving PIC simulations, and the method correctly describes the two-stream and Weibel instabilities, conserving exactly the total energy. The computational time of the energy conserving PIC method increases linearly with the number of particles, and it is rather insensitive to the number of grid points and time step. The kinetic enslavement technique can be effectively used to reduce the problem matrix size and the number of JFNK solver iterations

Physics-based passivity-preserving parameterized model order reduction for PEEC circuit analysis

The decrease of integrated circuit feature size and the increase of operating frequencies require 3-D electromagnetic methods, such as the partial element equivalent circuit (PEEC) method, for the analysis and design of high-speed circuits. Very large systems of equations are often produced by 3-D electromagnetic methods, and model order reduction (MOR) methods have proven to be very effective in combating such high complexity. During the circuit synthesis of large-scale digital or analog applications, it is important to predict the response of the circuit under study as a function of design parameters such as geometrical and substrate features. Traditional MOR techniques perform order reduction only with respect to frequency, and therefore the computation of a new electromagnetic model and the corresponding reduced model are needed each time a design parameter is modified, reducing the CPU efficiency. Parameterized model order reduction (PMOR) methods become necessary to reduce large systems of equations with respect to frequency and other design parameters of the circuit, such as geometrical layout or substrate characteristics. We propose a novel PMOR technique applicable to PEEC analysis which is based on a parameterization process of matrices generated by the PEEC method and the projection subspace generated by a passivity-preserving MOR method. The proposed PMOR technique guarantees overall stability and passivity of parameterized reduced order models over a user-defined range of design parameter values. Pertinent numerical examples validate the proposed PMOR approach