A Hardware-in-the-Loop Platform for DC Protection

With the proliferation of power electronics, dc-based power distribution systems can be realized; however, dc electrical protection remains a significant barrier to mass implementation dc power distribution. Controller Hardware-in-the-loop (CHiL) simulation enables moving up technology readiness levels (TRL) quickly. This work presents an end-to-end solution for dc protection CHiL for early design exploration and verification for dc protection, allowing for the rapid development of dc protection schemes for both Line-to-Line (LL) and Line-to-Ground (LG) faults. The approach combines using Latency Based Linear Multistep Compound (LB-LMC), a real-time simulation method for power electronic, and National Instruments (NI) FPGA hardware to enable dc protection design with CHiL. A case study is performed for a 1.5 MW Voltage Source Rectifier (VSR) under LL and LG faults in an ungrounded system. The deficiency in real-time simulation resolution of Commercial-off-the-Shelf (COTS) for dc fault transients is shown, and addressed by using LB-LMC RT solver inside NI FPGA hardware to achieve 50 ns resolution of dc fault transients

Pengaruh adukan dan kepekatan partikel silicon karbida sebagai penguat terhadap kelakuan salutan komposit matriks nikel

Affordable quality housing is vital in developing countries to meet its growing population. Development of a new cost effective system is crucial to fulfill these demands. In view of this, a study is carried out to develope a Precast Lightweight Foamed Concrete Sandwich Panel (PLFP), as a new affordable building system. Experimental investigation and finite element analysis to study the structural behaviour of the PLFP panel under axial load is undertaken. The panel consists of two foamed concrete wythes and a polystyrene insulation layer in between the wythes. The wythes are reinforced with high tensile steel bars and tied up to each other through the polystyrene layer by steel shear connectors bent at an angle of 45º. The panels are loaded with axial load until failure. The ultimate load carrying capacity, load-lateral deflection profile, strain distributions, and the failure mode are recorded. Partial composite behaviour is observed in all specimens when the cracking load is achieved. Finite element analysis is also carried out to study the effect of slenderness ratio and shear connectors which are the major parameters that affect the strength and behaviour of the panels. An empirical equation to predict the maximum load carrying capacity of the panels is proposed. The PLFP system proposed in this research is able to achieve the intended strength for use in low rise building. Considering its lightweight and precast construction method, it is feasible to be developed further as a competitive IBS building system

Space-vector-modulated three-level inverters with a single Z-source network

The Z-source inverter is a relatively recent converter topology that exhibits both voltage-buck and voltage-boost capability. The Z-source concept can be applied to all dc-to-ac, ac-to-dc, ac-to-ac, and dc-to-dc power conversion whether two-level or multilevel. However, multilevel converters offer many benefits for higher power applications. Previous publications have shown the control of a Z-source neutral point clamped inverter using the carrier based modulation technique. This paper presents the control of a Z-source neutral point clamped inverter using the space vector modulation technique. This gives a number of benefits, both in terms of implementation and harmonic performance. The adopted approach enables the operation of the Z-source arrangement to be optimised and implemented digitally without introducing any extra commutations. The proposed techniques are demonstrated both in simulation and through experimental results from a prototype converter

Power Converters in Power Electronics

In recent years, power converters have played an important role in power electronics technology for different applications, such as renewable energy systems, electric vehicles, pulsed power generation, and biomedical sciences. Power converters, in the realm of power electronics, are becoming essential for generating electrical power energy in various ways. This Special Issue focuses on the development of novel power converter topologies in power electronics. The topics of interest include, but are not limited to: Z-source converters; multilevel power converter topologies; switched-capacitor-based power converters; power converters for battery management systems; power converters in wireless power transfer techniques; the reliability of power conversion systems; and modulation techniques for advanced power converters

三相電圧形インバータ用モデル予測制御のFPGAによる実装手法の開発： モデルベース設計手法，HILシミュレーション，FPGAリソース最適化

Model predictive control (MPC), a modern switching control method, has gained considerable interest in performing control objectives of power converters. One of the categories in a wide family of MPC is finite control set-MPC (FCS-MPC) that utilizes the discrete-time model of a power converter having a limited number of switching states for solving the optimization problem online. In FCS-MPC, a discrete-time model of the power converter is used to predict future values of control parameters and an optimization function (cost function) is used to select the optimized switching state of the converter. High computational requirements of the FCS-MPC is a concern for the system implementation. Field-programmable gate array (FPGA) is an effective alternative to handle the computational burden of the control algorithm because of its parallel processing nature. In general, the MPC algorithm is performed through a programming approach either for DSP or FPGA. However, digital resource utilization is another concern for the development and real-time system implementation. Digital resource optimization requires a high value of in-depth knowledge to write the hardware descriptive code. Moreover, debugging is also a tedious and time-consuming task that is not appropriate for the development and analysis of the controller as well as prototyping. In this work, the implementation of FCS-MPC is performed by adopting the modelling approach in a digital simulator that provides a virtual FPGA environment for system development. In addition, hardware-in-the-loop (HIL) technique is used for testing of controller performance before experimental validation. The current prediction is a core part of the FCS-MPC and a coefficient used for the current prediction that is computed using the system parameters affects the controller performance. In this work, a novel approach is presented to update the predictive model, called an adaptive predictive model, corresponding to a change in the load resistance while keeping a fixed value of load inductance. The fixed, approximated and adaptive values of a coefficient are adopted for current prediction to investigate the behaviour of the controller. The performance of the FCS-MPC depends on the sampling frequency used for the discretization of the converter model that governs the switching frequency of the converter. The performance can be improved with higher sampling frequency, however, resulting in higher switching frequency that ultimately increases the switching losses in the power devices. Apart from that, a non-zero steady-state error is one of the concerns of the FCS-MPC implementation. In general, dedicated constraints for the reduction in average switching frequency and SSE are incorporated inside a cost function in conventional FCS-MPC. Nevertheless, that ultimately increases the computational burden. A modified cost function based on a novel constraint is proposed for the improvement in SSE as well as a reduction in the switching frequency using the modified FCS-MPC approach. To validate the performance of the proposed constraint, a comparative analysis is presented with the constraint of a change in switching state considering indices SSE as well as average switching frequency. Moreover, the different load currents and sampling time are considered to evaluate SSE considering similar load current ripples. To evaluate the robustness of the FCS-MPC algorithms, a step-change in reference current is considered for the demonstration of dynamic performance. Moreover, an analytical approach based implementation strategies is proposed for FPGA resource optimization of the FCS-MPC development in a digital simulator for the FPGA-based system implementation. The implementation of FCS-MPC in stationary αβ and rotating dq frames is adopted for in-depth system analysis. The implementation strategies are compared based on FPGA resource requirements for the FCS-MPC in both frames corresponding to the fixed, approximated and adaptive coefficient values of the predictive model. The optimum design based controller model is used for the FPGA-based experimental system implementation. Xilinx system generator (XSG) as a digital simulator that is an integrated platform with MATLAB/Simulink is used for the development of the controller. The FCS-MPC is implemented for the load-side current control of a three-phase voltage source inverter (VSI) system. A Xilinx FPGA board (Zedboard Zynq Evaluation and Development Kit) is used for the HIL simulation as well as the real-time system implementation.九州工業大学博士学位論文 学位記番号：生工博甲第367号 学位授与年月日：令和2年3月25日1: INTRODUCTION| 2: FINITE CONTROL SET - MODEL PREDICTIVE CONTROL| 3: MODEL-BASED DESIGN AND HIL SIMULATION| 4: ADVANCED FCS?MPC: ADAPTIVE PREDICTIVE MODEL AND MODIFIED COST FUNCTION| 5: FPGA RESOURCE OPTIMIZATION| 6: CONCLUSIONS AND FUTURE WORK九州工業大学令和元年