1,678 research outputs found

    A review of advances in pixel detectors for experiments with high rate and radiation

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    The Large Hadron Collider (LHC) experiments ATLAS and CMS have established hybrid pixel detectors as the instrument of choice for particle tracking and vertexing in high rate and radiation environments, as they operate close to the LHC interaction points. With the High Luminosity-LHC upgrade now in sight, for which the tracking detectors will be completely replaced, new generations of pixel detectors are being devised. They have to address enormous challenges in terms of data throughput and radiation levels, ionizing and non-ionizing, that harm the sensing and readout parts of pixel detectors alike. Advances in microelectronics and microprocessing technologies now enable large scale detector designs with unprecedented performance in measurement precision (space and time), radiation hard sensors and readout chips, hybridization techniques, lightweight supports, and fully monolithic approaches to meet these challenges. This paper reviews the world-wide effort on these developments.Comment: 84 pages with 46 figures. Review article.For submission to Rep. Prog. Phy

    Study of the impact of lithography techniques and the current fabrication processes on the design rules of tridimensional fabrication technologies

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    Working for the photolithography tool manufacturer leader sometimes gives me the impression of how complex and specific is the sector I am working on. This master thesis topic came with the goal of getting the overall picture of the state-of-the-art: stepping out and trying to get a helicopter view usually helps to understand where a process is in the productive chain, or what other firms and markets are doing to continue improvingUniversidad de sevilla.Máster Universitario en Microelectrónica: Diseño y Aplicaciones de Sistemas Micro/Nanométrico

    A Dry Etch Approach To Reduce Roughness And Eliminate Visible Grind Marks In Silicon Wafers Post Back-grind

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    3D wafer packaging represents a significant component of the total wafer level processing cost. Replacement of the Chemical Mechanical Polishing (CMP) process step with a corresponding dry etch can yield significant time and cost savings. Incorporating equipment already utilized in the 3D integrated wafer packaging process during the subsequent Through Silicon Via (TSV) reveal step, process efficiencies can be achieved, with overall die yields being maintained. Using dry etch technology to treat a 200nm rough back-ground silicon surface, a smooth surface with a peak to valley roughness of less than 6nm is demonstrated. This patented process differs from other dry etch smoothing techniques in that it aims to eliminate any visual grind marks rather than just reducing the surface roughness. The elimination of visible grind marks is critical in later optical inspection where they are falsely identified as defects. The quality of the surface is equivalent to that of a CMP processed wafer and as such, this process has been implemented in manufacturing replacing the CMP step. The novel process described combines a surface modification followed by a roughness reduction in an iterative manner to produce a smooth surface without visible grind marks post processing

    Characterization of Flexible Hybrid Electronics Using Stretchable Silver Ink and Ultra-Thin Silicon Die

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    Flexible Hybrid Electronics (FHEs) offer many advantages to the future of wearable technology. By combining the dynamic performance of conductive inks, and the functionality of ultra-thinned, traditional IC technology, new FHE devices allow for development of applications previously excluded by relying on a specific type of electronics technology. The characterization and reliability analysis of stretchable conductive inks paired with ultra-thin silicon die in theµm range was conducted. A silver based ink designed to be stretchable was screen printed on a TPU substrate and cured using box oven, conveyor convection oven, and photonic curing processes. Reliability tests were conducted including a tape test, crease test, wash test, and abrasion test. Optimization of each curing process resulted in all three methods’ ability to achieve the ink sheet resistance specification of \u3c75mΩ/square/25µm. Reliability tests on the printing concluded that, if fully cured, all samples achieve similar reliability performance. Additionally, a series of 10 mm x 10 mm ultra-thin die were characterized using stylus profilometry and optical measurement in order to test the die quality and readiness for assembly. The die had been thinned from an initial thickness down of 600 µm to a target of 50 µm. A direct inverse relationship was shown between die thickness and die warpage, likely due to high levels of internal stress caused by the dicing and thinning process. Finally, an innovate pairing of serpentine copper clad traces on TPU was tested for reliability performance using traditional solder for die attachment

    High-Density Solid-State Memory Devices and Technologies

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    This Special Issue aims to examine high-density solid-state memory devices and technologies from various standpoints in an attempt to foster their continuous success in the future. Considering that broadening of the range of applications will likely offer different types of solid-state memories their chance in the spotlight, the Special Issue is not focused on a specific storage solution but rather embraces all the most relevant solid-state memory devices and technologies currently on stage. Even the subjects dealt with in this Special Issue are widespread, ranging from process and design issues/innovations to the experimental and theoretical analysis of the operation and from the performance and reliability of memory devices and arrays to the exploitation of solid-state memories to pursue new computing paradigms

    Polyimide reinforcement of capped MEMS devices : soft and simple

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    Selective Dry Etch for Defining Ohmic Contacts for High Performance ZnO TFTs

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    Recently, gigahertz RF performance has been demonstrated in zinc oxide (ZnO) TFT. However, the need arises for sub-micron channel length (Lc) dimensions to extend these results into X-band frequency range of operation. This thesis is a pioneering effort identifying device access materials to be selectively etched to ZnO via plasma-assisted etch (PAE) to avoid processing limitations from traditional optical lithography channel definition methods. A subtractive etch process using CF4/O2 gas mixture was completed with various Ohmic contact materials to ZnO providing foundational research upon which nano-scale, high-frequency ZnO thin-film transistors (TFTs) could be fabricated. Molybdenum, tantalum, titanium tungsten 10-90, and tungsten metallic contact schemes to ZnO are investigated for their etch selectivities to ZnO and etch profiles. Tungsten displayed promising device scalability results with excellent aspect ratio and 200nm Lc. A new semiconductor-semiconductor contact interface to ZnO using nc-Si is initially reported with 15mA/mm current density and 18mS/mm transconductance. Nc-Si also displays promising scaling results through the subtractive etch process defined with e-beam lithography. Results included 157nm channel length, high aspect ratio, and high extrapolated current density of nearly 1A/mm at 100nm Lc and gate and drain voltages of 10V

    Development of suspended thermoreflectance technique and its application in thermal property measurement of semiconductor materials

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    Doctor of PhilosophyDepartment of Mechanical and Nuclear EngineeringGurpreet SinghThis dissertation details the development of a new scientific tool for the thermal characterization of freestanding micro/nano-scale materials, with specific application to thin films. The tool consists of a custom-designed and calibrated opto-electric system with superior spatial and temporal resolutions in thermal measurement. The tool, termed as Suspended ThermoReflectance (STR), can successfully perform thermal mappings at the submicron level and is able to produce unconstrained thermal conductivity unlike other optical measurement techniques where independent conductivity measurement is not possible due to their reliance on heat capacity. STR works by changing the temperature of a material and collecting the associated change in light reflection from multiple points on the sample surface. The reflection is a function of the material being tested, the wavelength of the probe light and the composition of the specimen for transparent and quasi-transparent materials. Coupling the change in reflection, along the sample’s length, with the knowledge of heat conduction allows for the determination of the thermal properties of interest. A thermal analytical model is developed and incorporated with optical equations to characterize the conductivity of thin films. The analytical model is compared with a finite element model to check its applicability in the STR experiment and data analysis. Ultimately, thermal conductivity of 2 µm and 3 µm thick Si samples were determined using STR at a temperature range of 20K – 350K and compared to literature as a validation of the technique. The system was automated using a novel LabView-based program. This program allowed the user to control the equipment including electronics, optics and optical cryostat. Moreover, data acquisition and real-time monitoring of the system are also accomplished through this computer application. A description of the development, fabrication and characterization of the freestanding thin films is detailed in this dissertation. For the most part, the thin films were fabricated using standard microfabrication techniques. However, different dry and wet etching techniques were compared for minimum surface roughness to reduce light scattering. The best etching technique was used to trim the Si films for the desired thicknesses. Besides, vapor HF was used to avoid stiction-failure during the release of suspended films

    Fabrication of Silicon Microneedles for Dermal Interstitial Fluid Extraction in Human Subjects

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    The goal of this project is to design and develop a fabrication process for silicon microneedle arrays to extract dermal interstitial fluid (ISF) from human skin. ISF is a cell- free, living tissue medium that is known to contain many of the same, clinical biomarkers of general health, stress response and immune status as in blood. However, a significant barrier to adoption of ISF as a diagnostic matrix is the lack of a rapid, minimally invasive method of access and collection for analysis. Microfabricated chips containing arrays of microneedles that can rapidly and painlessly access and collect dermal ISF for bioassay could greatly facilitate point-of-care diagnosis and health monitoring, especially in times of crisis or in austere environments, where drawing venous blood poses an unnecessary infection or biohazard risk. Two different fabrication methods were explored. The first method borrows from a previously reported dicing saw process, where a series of parallel and perpendicular cuts of partial depth are made into a thicker silicon wafer, creating arrays of square columns, which are subsequently sharpened into needles. The second method uses a new, entirely-DRIE process to create the arrays of columns. The columns are sharpened into needles using an isotropic wet etch method (HNA etch) which preferentially enhances etching at the tips and diminishes etching at the base, creating remarkably sharp, conical shaped needles capable of piercing skin. The needles contain holes that pass through the wafer to the opposite side, where they connect to a series of microfluidic channels that lead to a reservoir. The back of the wafer is bonded to glass, providing a hydrophilic cap to the channels, as well as a way to see into the device to detect whether the channels are filling with liquid. The fabrication procedures for both methods are presented, along with 2D- and 3D-rendered schematics for the final devices. Needle geometric shape is crucial to their ability to extract ISF. To determine the appropriate pre-sharpened etched shape, needle columns with a variety of different shapes were designed, produced, sharpened, and examined under a scanning electron microscope. The most promising shapes were selected for further processing and testing. Resulting chips were first bench tested to ensure capillary filling capability, and then tested for ISF collection from human skin. Microneedle arrays which were successfully demonstrated to extract ISF are presented, and the unsuccessful shapes are also shown in the interest of completion. Potential means for improving performance and future research directions are discussed
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