Finite element modeling of misalignment in interconnect vias

Electrical resistance and hence heat generation in semiconductor chips are becoming more significant issues particularily as generations of silicon devices continue to have smaller features. The resistance of interconnect vias is a significant source of heat generation because of the increasing number of these on chips and increases in via resistance due to reduced size. Finite element modeling of voltage drops and current flow through interconnect vias gives information to aid in designing geometry and materials used in forming vias. It can also be used for modeling the thermal distribution in a via and hence the contribution by vias to heating a chip. In this paper we examine the effect of misalignment of the via between the two metal layers M1 and M2 with regard to the interconnect via resistance. The effect of the interface specific contact resistance is examined in particular. Significant misalignment can be tolerated without increasing the via resistance. The heat generation due to electrical current flow in the via materials and interfaces is modelled using the samefinite element mesh and software. The output of the electrical analysis is used as the heat generation input for the therml analysis

Fundamental Characterization of Low Dimensional Carbon Nanomaterials for 3D Electronics Packaging

Transistor miniaturization has over the last half century paved the way for higher value electronics every year along an exponential pace known as \u27Moore\u27s law\u27. Now, as the industry is reaching transistor features that no longer makes economic sense, this way of developing integrated circuits (ICs) is coming to its definitive end. As a solution to this problem, the industry is moving toward higher hanging fruits that can enable larger sets of functionalities and ensuring a sustained performance increase to continue delivering more cost-effective ICs every product cycle. These design strategies beyond Moore\u27s law put emphasis on 3D stacking and heterogeneous integration, which if implemented correctly, will deliver a continued development of ICs for a foreseeable future. However, this way of building semiconductor systems does bring new issues to the table as this generation of devices will place additional demands on materials to be successful. The international roadmap of devices and systems (IRDS) highlights the need for improved materials to remove bottlenecks in contemporary as well as future systems in terms of thermal dissipation and interconnect performance. For this very purpose, low dimensional carbon nanomaterials such as graphene and carbon nanotubes (CNTs) are suggested as potential candidates due to their superior thermal, electrical and mechanical properties. Therefore, a successful implementation of these materials will ensure a continued performance to cost development of IC devices.This thesis presents a research study on some fundamental materials growth and reliability aspects of low dimensional carbon based thermal interface materials (TIMs) and interconnects for electronics packaging applications. Novel TIMs and interconnects based on CNT arrays and graphene are fabricated and investigated for their thermal resistance contributions as well electrical performance. The materials are studied and optimized with the support of chemical and structural characterization. Furthermore, a reliability study was performed which found delamination issues in CNT array TIMs due to high strains from thermal expansion mismatches. This study concludes that CNT length is an important factor when designing CNT based systems and the results show that by further interface engineering, reliability can be substantially improved with maintained thermal dissipation and electrical performance. Additionally, a heat treatment study was made that enables improvement of the bulk crystallinity of the materials which will enable even better performance in future applications

Ono: an open platform for social robotics

In recent times, the focal point of research in robotics has shifted from industrial ro- bots toward robots that interact with humans in an intuitive and safe manner. This evolution has resulted in the subfield of social robotics, which pertains to robots that function in a human environment and that can communicate with humans in an int- uitive way, e.g. with facial expressions. Social robots have the potential to impact many different aspects of our lives, but one particularly promising application is the use of robots in therapy, such as the treatment of children with autism. Unfortunately, many of the existing social robots are neither suited for practical use in therapy nor for large scale studies, mainly because they are expensive, one-of-a-kind robots that are hard to modify to suit a specific need. We created Ono, a social robotics platform, to tackle these issues. Ono is composed entirely from off-the-shelf components and cheap materials, and can be built at a local FabLab at the fraction of the cost of other robots. Ono is also entirely open source and the modular design further encourages modification and reuse of parts of the platform

Nanoelectronic COupled problems solutions - nanoCOPS: modelling, multirate, model order reduction, uncertainty quantification, fast fault simulation

The FP7 project nanoCOPS derives new methods for simulation during development of designs of integrated products. It covers advanced simulation techniques for electromagnetics with feedback couplings to electronic circuits, heat and stress. It is inspired by interest from semiconductor industry and by a simulation tool vendor in electronic design automation. The project is on-going and the paper presents the outcomes achieved after the first half of the project duration

Optimization with artificial intelligence in additive manufacturing: a systematic review

In situations requiring high levels of customization and limited production volumes, additive manufacturing (AM) is a frequently utilized technique with several benefits. To properly configure all the parameters required to produce final goods of the utmost quality, AM calls for qualified designers and experienced operators. This research demonstrates how, in this scenario, artificial intelligence (AI) could significantly enable designers and operators to enhance additive manufacturing. Thus, 48 papers have been selected from the comprehensive collection of research using a systematic literature review to assess the possibilities that AI may bring to AM. This review aims to better understand the current state of AI methodologies that can be applied to optimize AM technologies and the potential future developments and applications of AI algorithms in AM. Through a detailed discussion, it emerges that AI might increase the efficiency of the procedures associated with AM, from simulation optimization to in-process monitoring

Modeling and design for energy-efficient spintronic logic devices and circuits

The objective of the proposed research is the modeling and the design of energy-efficient and scalable novel spintronic devices. Over the past two decades, spintronic devices have achieved special status due to their advantages in terms of low-voltage operation, smaller footprint area, non-volatile memory, and compatibility with CMOS technology. To design efficient spin-based systems, researchers require the precise modeling of the physics of nanomagnets, piezoelectrics, thermal noise, and metallic nanowires. Using the models developed during the research, spintronic logic devices comprised of hybrid magnetic and piezoelectric structures are proposed. The delay, energy dissipation, and footprint area of the proposed devices are analyzed. Moreover, the proposed devices are used as building blocks to propose spin-based logic gates, pattern and image recognition circuits, long-range interconnects, interface circuits, and coupled-oscillators. The performance of the proposed circuits is benchmarked against CMOS and other spin-based circuits, which shows improved performance, especially in implementing non-Boolean applications and interface circuits.Ph.D