633 research outputs found

    An electrocardiogram readout circuit based on CMOS operational floating current conveyor

    Get PDF
    Electrocardiogram (ECG) is used in diagnosing heart diseases. It is designed as integration between current-mode instrumentation amplifiers (CMIA) and low pass filter (LPF). Normal heart behavior can be identified simply by normal ECG that consists of signal while heart disorder can be recognized by having differences in the features of their corresponding ECG waveform. A novel integrated CMOS-based operational floating current conveyor (OFCC) circuit is proposed. OFCC is a five port general purpose analog building block which combines all the features of different current mode devices such as the second generation current conveyor (CCII), the current feedback operational amplifier (CFA), and the operational floating conveyor (OFC). The OFFC is modeled and simulated using UMC 130nm CMOS technology kit in Cadence with a supply voltage 1.2V. The ECG readout circuit has been designed using the proposed OFCC as a building block. The advantages of this: it is integrated, noise factor is small as the proposed OFCC has the lowest input noise voltage and the layout is simple as it is a single block that can be repeated several times

    Circuit Design And Reliability Of A Cmos Receiver

    Get PDF
    This dissertation explores CMOS RF design and reliability for portable wireless receivers. The objective behind this research is to achieve an increase in integration level, and gain more understanding for RF reliability. The fields covered include device, circuit and system. What is under investigation is a multi-band multi-mode receiver with GSM, DCS-1800 and CDMA compatibility. To my understanding, GSM and CDMA dual-mode mobile phones are progressively investigated in industries, and few commercial products are available. The receiver adopts direct conversion architecture. Some improved circuit design methods are proposed, for example, for low noise amplifier (LNA). Except for band filters, local oscillators, and analog-digital converters which are usually implemented by COTS SAW filters and ICs, all the remaining blocks such as switch, LNA, mixer, and local oscillator are designed in MOSIS TSMC 0.35[micro]m technology in one chip. Meanwhile, this work discusses related circuit reliability issues, which are gaining more and more attention. Breakdown (BD) and hot carrier (HC) effects are important issues in semiconductor industry. Soft-breakdown (SBD) and HC effects on device and RF performance has been reported. Hard-breakdown (HBD) effects on digital circuits have also been investigated. This work uniquely address HBD effects on the RF device and circuit performance, taking low noise amplifier and power amplifier as targets

    Reconfigurable RF Front End Components for Multi-Radio Platform Applications

    Get PDF
    The multi-service requirements of the 3G and 4G communication systems, and their backward compatibility requirements, create challenges for the antenna and RF front-end designs with multi-band and wide-band techniques. These challenges include: multiple filters, which are lossy, bulky, and expensive, are needed in the system; device board size limitation and the associated isolation problems caused by the limited space and crowd circuits; and the insertion loss issues created by the single-pole-multi-through antenna switch. As will be shown, reconfigurable antennas can perform portions of the filter functions, which can help solve the multiple filters problem. Additionally, reconfigurable RF circuits can decrease the circuit size and output ports, which can help solve board size limitation, and isolation and antenna switch insertion loss issues. To validate the idea that reconfigurable antennas and reconfigurable RF circuits are a viable option for multi-service communication system, a reconfigurable patch antenna, a reconfigurable monopole antenna, and a reconfigurable power amplifier (PA) have been developed. All designs adapt state-of-the-art techniques. For the reconfigurable antenna designs, an experiment demonstrating its advantages, such as jamming signal resistance, has been performed. Reconfigurable antennas provide a better out-ofoperating- band noise performance than the multi-band antennas design, decreasing the need for filters in the system. A full investigation of reconfigurable antennas, including the single service reconfigurable antenna, the mixed signal service reconfigurable antenna, and the multi-band reconfigurable antenna, has been completed. The design challenges, which include switches investigation, switches integration, and service grouping techniques, have been discussed. In the reconfigurable PA portion, a reconfigurable PA structure has first been demonstrated, and includes a reconfigurable output matching network (MN) and a reconfigurable die design. To validate the proposed reconfigurable PA structure, a reconfigurable PA for a 3G cell phone system has been designed with a multi-chip module technique. The reconfigurable PA structure can significantly decrease the real-estate, cost, and complexity of the PA design. Further, by decreasing the number of output ports, the number of poles for the antenna switch will be decreased as well, leading to an insertion loss decrease

    Transients in Power Systems

    Get PDF
    Power system engineering largely focuses on steady state analysis. The main areas of power system engineering are power flow studies and fault studies - both steady state technologies. But the world is largely transient, and power systems are always subject to time varying and short lived signals. This technical report concerns several important topics in transient analyses of power systems. The leading chapter deals with a new analytical tool-wavelets-for power system transients. Flicker and electric are furnace transients are discussed in Chapters I1 and IV. Chapter 111 deals with transients from shunt capacitor switching. The concluding chapters deal with transformer inrush current and non simultaneous pole closures of circuit breakers. This report was prepared by the students in EE532 at Purdue University. When I first came to Purdue in 1965, Professor El-Abiad was asking for student term projects which were turned into technical reports. I have \u27borrowed\u27 this idea and for many years we have produced technical reports from the power systems courses. The students get practice in writing reports, and the reader is able to get an idea of the coverage of our courses. I think that the students have done a good job on the subject of transients in power systems

    Distributed Circuit Analysis and Design for Ultra-wideband Communication and sub-mm Wave Applications

    Get PDF
    This thesis explores research into new distributed circuit design techniques and topologies, developed to extend the bandwidth of amplifiers operating in the mm and sub-mm wave regimes, and in optical and visible light communication systems. Theoretical, mathematical modelling and simulation-based studies are presented, with detailed designs of new circuits based on distributed amplifier (DA) principles, and constructed using a double heterojunction bipolar transistor (DHBT) indium phosphide (InP) process with fT =fmax of 350/600 GHz. A single stage DA (SSDA) with bandwidth of 345 GHz and 8 dB gain, based on novel techniques developed in this work, shows 140% bandwidth improvement over the conventional DA design. Furthermore, the matrix-single stage DA (M-SSDA) is proposed for higher gain than both the conventional DA and matrix amplifier. A two-tier M-SSDA with 14 dB gain at 300 GHz bandwidth, and a three-tier M-SSDA with a gain of 20 dB at 324 GHz bandwidth, based on a cascode gain cell and optimized for bandwidth and gain flatness, are presented based on full foundry simulation tests. Analytical and simulation-based studies of the noise performance peculiarities of the SSDA and its multiplicative derivatives are also presented. The newly proposed circuits are fabricated as monolithic microwave integrated circuits (MMICs), with measurements showing 7.1 dB gain and 200 GHz bandwidth for the SSDA and 12 dB gain at 170 GHz bandwidth for the three-tier M-SSDA. Details of layout, fabrication and testing; and discussion of performance limiting factors and layout optimization considerations are presented. Drawing on the concept of artificial transmission line synthesis in distributed amplification, a new technique to achieve up to three-fold improvement in the modulation bandwidth of light emitting diodes (LEDs) for visible light communication (VLC) is introduced. The thesis also describes the design and application of analogue pre-emphasis to improve signal-to-noise ratio in bandwidth limited optical transceivers

    Удосконалення схем побудови підсилювачів та автогенераторів класу Е

    Get PDF
    Робота виконана на кафедрі радіофізики та кібербезпеки Донецького національного університету імені Василя Стуса Міністерства освіти і науки УкраїниДисертаційна робота присвячена розвитку методів розрахунку автогенераторів та підсилювачів класу Е та удосконаленню схем, що дозволить розширити межі застосування активних пристроїв класу Е за рахунок отримання потрібних характеристик схеми. Розроблено аналітичний метод розрахунку підсилювача класу Е з паралельним вихідним контуром за умови наявності додаткової послідовної, зазвичай паразитної, реактивності навантаження та встановлено закономірності зміни параметрів вихідного кола в залежності від знаку та величини додаткової реактивності. Отримав подальший розвиток метод розрахунку підсилювача класу Е з паралельним вихідним контуром із введенням в схему додаткового контуру, що дозволило знизити пікову напругу на транзисторі та отримувати параметри підсилювача в залежності від положення мінімуму напруги. Показано можливість зниження пікової напруги також за рахунок зміни значення коефіцієнта заповнення вхідного сигналу. Встановлено закономірності між додатковими складовими опору транзистора у відкритому стані та параметрами елементів вихідного кола підсилювача класу Е. На прикладі застосування SiC та GaN транзисторів у широкосмугових підсилювачах класу Е проведено уточнення моделей транзисторів для їх використання при моделюванні роботи підсилювача класу Е. Визначено особливості побудови НВЧ підсилювачів в інтегральному виконанні з використанням паразитних параметрів пасивних компонентів на кристалі. Запропонована нова конструкція автогенератора класу Е зі зміненим колом зворотного зв’язку, що дозволило отримати більшу стабільність частоти.The work is devoted to the development of methods for calculating class E oscillators and amplifiers and analyzing the possibilities of improving circuits, which will expand the scope of application of class E active devices by obtaining the desired characteristics of the circuit. Method for calculating of class E amplifier with shunt filter with the presence of additional, usually parasitic reactance in series with load resistance is proposed, and regularities of changes in the parameters of the output circuit are established depending on the sign and magnitude of the additional reactance. It is shown that for any sign and value of reactance the circuit elements parameters can be calculated, and class E waveforms can be obtained thus amplifier can work either with complex load or with high parasitic load parameters. A calculation method is proposed for further modernization of the class E amplifier circuit with shunt filter by introducing an additional parallel LC-tank, which made it possible to reduce the peak transistor voltage and obtain the amplifier parameters depending on the position of the voltage minimum. A set of the output load network parameters can be found for desirable transistor drain voltage waveform. The possibility of reducing the peak voltage is also shown by changing the value of the duty cycle of input signal for variations of class E amplifier with shunt filter schematic: the first one – without additional circuit, the second variant of an amplifier has additional parallel LC tank tuned on the second harmonic of operating frequency – class E/F3 mode and the third one uses additional parallel LC tank tuned on the third harmonic of operating frequency. And for any of those variants either decreasing of transistor voltage stress or higher output power can be obtained thus satisfying wide range of objectives for designing such amplifiers. Regularities have been established between the additional components of the transistor on-state resistance and the parameters of the elements of the output circuit of class E amplifier. Shown that using of advanced procedure of calculating amplifier circuit elements with taking into account addition separate part of on-state resistance leads to obtain the elements values which differ from those, calculated from standard method for nonzero onstate resistance. Using of useful for switching-mode class E amplifiers due to their high breakdown voltage, high power density low interelectrode capacity widegap SiC and GaN transistors in broadband class E amplifiers, the transistor models are refined for their use in modeling the operation of a class E amplifier. It is shown that Angelov nonlinear model for SiC transistor has to be used instead of simplifying Materka model for simulating of switching-mode class E power amplifiers. As for GaN NPTB00025 transistor it is experimentally shown that the parasitic RC-circuit in its nonlinear model can be ignored while designing of class E amplifiers with such GaN transistor. The features of the construction of integrated microwave amplifiers using parasitic parameters of passive components on a chip are determined. A method for constructing a self-oscillator of class E with a modified feedback circuit that acts as a low pass filter is proposed, which made it possible to obtain a higher equivalent quality-factor and thus a frequency stability in comparison with standard class E oscillators with simple feedback circuit, consisting of one inductance

    Broadband RF Front-End Design for Multi-Standard Receiver with High-Linearity and Low-Noise Techniques

    Get PDF
    Future wireless communication devices must support multiple standards and features on a single-chip. The trend towards software-defined radio requires flexible and efficient RF building blocks which justifies the adoption of broadband receiver front-ends in modern and future communication systems. The broadband receiver front-end significantly reduces cost, area, pins, and power, and can process several signal channels simultaneously. This research is mainly focused on the analysis and realization of the broadband receiver architecture and its various building blocks (LNA, Active Balun-LNA, Mixer, and trans-impedance amplifier) for multi-standard applications. In the design of the mobile DTV tuner, a direct-conversion receiver architecture is adopted achieving low power, low cost, and high dynamic-range for DVB-H standard. The tuner integrates a single-ended RF variable gain amplifier (RFVGA), a current-mode passive mixer, and a combination of continuous and discrete-time baseband filter with built-in anti-aliasing. The proposed RFVGA achieves high dynamic-range and gain-insensitive input impedance matching performance. The current-mode passive mixer achieves high gain, low noise, and high linearity with low power supplies. A wideband common-gate LNA is presented that overcomes the fundamental trade-off between power and noise match without compromising its stability. The proposed architecture can achieve the minimum noise figure over the previously reported feedback amplifiers in common-gate configuration. The proposed architecture achieves broadband impedance matching, low noise, large gain, enhanced linearity, and wide bandwidth concurrently by employing an efficient and reliable dual negative-feedback. For the wideband Inductorless Balun-LNA, active single-to-differential architecture has been proposed without using any passive inductor on-chip which occupies a lot of silicon area. The proposed Balun-LNA features lower power, wider bandwidth, and better gain and phase balance than previously reported architectures of the same kind. A surface acoustic wave (SAW)-less direct conversion receiver targeted for multistandard applications is proposed and fabricated with TSMC 0.13?m complementary metal-oxide-semiconductor (CMOS) technology. The target is to design a wideband SAW-less direct coversion receiver with a single low noise transconductor and current-mode passive mixer with trans-impedance amplifier utilizing feed-forward compensation. The innovations in the circuit and architecture improves the receiver dynamic range enabling highly linear direct-conversion CMOS front-end for a multi-standard receiver

    High-Power Microwave/ Radio-Frequency Components, Circuits, and Subsystems for Next-Generation Wireless Radio Front-Ends

    Get PDF
    As the wireless communication systems evolve toward the future generation, intelligence will be the main signature/trend, well known as the concepts of cognitive and software-defined radios which offer ultimate data transmission speed, spectrum access, and user capacity. During this evolution, the human society may experience another round of `information revolution\u27. However, one of the major bottlenecks of this promotion lies in hardware realization, since all the aforementioned intelligent systems are required to cover a broad frequency range to support multiple communication bands and dissimilar standards. As the essential part of the hardware, power amplifiers (PAs) capable of operating over a wide bandwidth have been identified as the key enabling technology. This dissertation focuses on novel methodologies for designing and realizing broadband high-power PAs, their integration with high-quality-factor (high-Q) tunable filters, and relevant investigations on the reliabilities of these tunable devices. It can be basically divided into three major parts: 1.Broadband High-Efficiency Power Amplifiers. Obtaining high PA efficiency over a wide bandwidth is very challenging, because of the difficulty of performing broadband multi-harmonic matching. However, high efficiency is the critical feature for high-performance PAs due to the ever-increasing demands for environmental friendliness, energy saving, and longer battery life. In this research, novel design methodologies of broad-band highly efficient PAs are proposed, including the first-ever mode-transferring PA theory, novel matching network topology, and wideband reconfigurable PA architecture. These techniques significantly advance the state-of-the-art in terms of bandwidth and efficiency. 2.Co-Design of PAs and High-Q Tunable Filters. When implementing the intelligent communication systems, the conventional approach based on independent RF design philosophy suffers from many inherent defects, since no global optimization is achieved leading to degraded overall performance. An attractive method to solve these difficulties is to co-design critical modules of the transceiver chain. This dissertation presents the first-ever co-design of PAs and tunable filters, in which the redundant inter-module matching is entirely eliminated, leading to minimized size & cost and maximized overall performance. The saved hardware resources can be further transferred to enhance system functionalities. Moreover, we also demonstrate that co-design of PAs and filters can lead to more functionalities/benefits for the wireless systems, e.g. efficient and linear amplification of dual-carrier (or multi-carrier) signals. 3.High-Power/Non-Linear Study on Tunable Devices. High-power limitation/power handling is an everlasting theme of tunable devices, as it determines the operational life and is the threshold for actual industrial applications. Under high-power operation, the high RF voltage can lead to failures like tuners\u27 mechanical deflections and gas discharge in the small air spacing of the cavity. These two mechanisms are studied independently with their instantaneous and long-term effects on the device performance. In addition, an anti-biased topology of electrostatic RF MEMS varactors and tunable filters is proposed and experimentally validated for reducing the non-linear effect induced by bias-noise. These investigations will enlighten the designers on how to avoid and/or minimize the non-ideal effects, eventually leading to longer life cycle and performance sustainability of the tunable devices

    Analysis And Design Of Wideband Passive Mixer-First Receivers

    Full text link
    This dissertation focuses on the design of wideband SAW-less receivers for softwaredefined radios. The entire body of work is based on a single RF front-end architecture type: a passive mixer connected directly to the antenna port of the radio, without an LNA or matching network up front. This structure is inherently wideband which allows for a single receiver front-end to operate at a wide range of frequencies, as tuned by its local oscillator (LO). Additionally, the mixer exhibits the property of transparency from the baseband port of the radio to the RF port of the radio, and vice versa. The focus of the first half of the thesis is on developing a simple theoretical framework for the impedance characteristics of the passive mixer, and implementing a maximally flexible receiver which utilizes the mixer's transparency to the fullest extent. Additionally, it is shown that mixing with 8 non-overlapping phases instead of the traditional 4 has benefits beyond harmonic rejection extending to improved noise performance and increased impedance tuning range. This receiver exhibits low noise figure (~3dB), excellent wideband linearity (IIP3[GREATER-THAN OR EQUAL TO]25dBm), and unprecedented RF impedance control from the baseband side of the passive mixer. Another wideband receiver is presented which explores increasing the number of LO phases even further to 16 and 32, increasing the impedance matching range. The same chip contains a circuit technique for alleviating the shunting effects of LO phase overlap on mixer conversion gain, noise, and impedance match range. Finally in a new design, the power consumption of the receiver architecture is decreased by a factor of 5x (and not scaling with RF frequency). This is done using a resonant LO drive with 8 non-overlapping phases, incorporating the large mixer gate capacitance directly into the LC tank of the VCO. Baseband power consumption is also reduced by reusing current in the four baseband amplifier channels, and performing harmonic rejection, all in one stage of amplification
    corecore