Fundamental study of underfill void formation in flip chip assembly

Flip Chip in Package (FCIP) has been developed to achieve the assembly process with area array interconnects. Particularly, a high I/O count coupled with finer pitch area array interconnects structured FCIP can be achieved using no-flow underfill assembly process. Using the assembly process, a high, stable yield assembly process recently reported with eutectic lead-tin solder interconnections, 150 µm pitch, and I/O counts in excess of 3000. The assembly process reported created a large number of voids among solder interconnects in FCIP. The voids formed among solder interconnections can propagate, grow, and produce defects such as solder joint cracking and solder bridging. Moreover, these voids can severely reduce reliability performance. Indeed, many studies were conducted to examine the void formation in FCIP. Based on the studies, flip chip geometric design, process conditions, and material formulation have been considered as the potential causes of void formation. However, the present research won't be able to identify the mechanism of void formation, causing a lot of voids in assembly process without consideration of chemical reaction in the assembly process with a fine-pitch, high I/O density FCIP. Therefore, this research will present process technology necessary to achieve high yields in FCIP assemblies using no-flow underfills and investigate the underlying problem of underfill void formation in these assemblies. The plausible causes of void formation will be investigated using experimental techniques. The techniques will identify the primary source of the void formation. Besides, theoretical models will be established to predict the number of voids and to explain the growth behavior of voids in the FCIP. The established theoretical models will be verified by experiments. These models will validate with respect to the relationship between process parameters to achieve a high yield and to minimize voids in FCIP assemblies using no-flow underfill materials regarding process as well as material stand points. Eventually, this research provides design guideline achieving a high, stable yield and void-free assembly process.Ph.D.Committee Chair: Baldwin, Daniel; Committee Member: Colton, Jonathan; Committee Member: Ghiaasiaan, Mostafa; Committee Member: Moon, Jack; Committee Member: Tummala, Ra

Numerical analysis of lead-free solder joints: effects of thermal cycling and electromigration

To meet the requirements of miniaturization and multifunction in microelectronics, understanding of their reliability and performance has become an important research subject in order to characterise electronics served under various loadings. Along with the demands of the increasing miniaturization of electronic devices, various properties and the relevant thermo-mechanical-electrical response of the lead-free solder joints to thermal cycling and electro-migration become the critical factors, which affect the service life of microelectronics in different applications. However, due to the size and structure of solder interconnects in microelectronics, traditional methods based on experiments are not applicable in the evaluation of their reliability under complex joint loadings. This thesis presents an investigation, which is based on finite-element method, into the performance of lead-free solder interconnects under thermal fatigue and electro-migration, specifically in the areas as follows: (1) the investigation of thermal-mechanical performance and fatigue-life prediction of flip-chip package under different sizes to achieve a further understanding of IMC layer and size effects of a flip chip package under thermal cycling; (2) the establishment of a numerical method, simulating void-formation/crack-propagation based on the results of finite-element analysis, to allow the prediction of crack evolution and failure time for electro-migration reliability of solder bumps; (3) the establishment of a flow-based algorithm for combination effects of thermal-mechanical and electro-migration that was subsequent implemented in to an FE model to evaluate the reliability assessment of service lives associated with a flip chip package

Void Formation Study of Flip Chip in Package Using No-Flow Underfill

©2008 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or distribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.DOI: 10.1109/TEPM.2008.2002951The advanced flip chip in package (FCIP) process using no-flow underfill material for high I/O density and fine-pitch interconnect applications presents challenges for an assembly process that must achieve high electrical interconnect yield and high reliability performance. With respect to high reliability, the voids formed in the underfill between solder bumps or inside the solder bumps during the no-flow underfill assembly process of FCIP devices have been typically considered one of the critical concerns affecting assembly yield and reliability performance. In this paper, the plausible causes of underfill void formation in FCIP using no-flow underfill were investigated through systematic experimentation with different types of test vehicles. For instance, the effects of process conditions, material properties, and chemical reaction between the solder bumps and no-flow underfill materials on the void formation behaviors were investigated in advanced FCIP assemblies. In this investigation, the chemical reaction between solder and underfill during the solder wetting and underfill cure process has been found to be one of the most significant factors for void formation in high I/O and fine-pitch FCIP assembly using no-flow underfill materials

Statistical Physics of Fracture Surfaces Morphology

Experiments on fracture surface morphologies offer increasing amounts of data that can be analyzed using methods of statistical physics. One finds scaling exponents associated with correlation and structure functions, indicating a rich phenomenology of anomalous scaling. We argue that traditional models of fracture fail to reproduce this rich phenomenology and new ideas and concepts are called for. We present some recent models that introduce the effects of deviations from homogeneous linear elasticity theory on the morphology of fracture surfaces, succeeding to reproduce the multiscaling phenomenology at least in 1+1 dimensions. For surfaces in 2+1 dimensions we introduce novel methods of analysis based on projecting the data on the irreducible representations of the SO(2) symmetry group. It appears that this approach organizes effectively the rich scaling properties. We end up with the proposition of new experiments in which the rotational symmetry is not broken, such that the scaling properties should be particularly simple.Comment: A review paper submitted to J. Stat. Phy

Electromigration Mechanism of Failure in Flip-Chip Solder Joints Based on Discrete Void Formation

In this investigation, SnAgCu and SN100C solders were electromigration (EM) tested, and the 3D laminography imaging technique was employed for in-situ observation of the microstructure evolution during testing. We found that discrete voids nucleate, grow and coalesce along the intermetallic compound/solder interface during EM testing. A systematic analysis yields quantitative information on the number, volume, and growth rate of voids, and the EM parameter of DZ*. We observe that fast intrinsic diffusion in SnAgCu solder causes void growth and coalescence, while in the SN100C solder this coalescence was not significant. To deduce the current density distribution, finite-element models were constructed on the basis of the laminography images. The discrete voids do not change the global current density distribution, but they induce the local current crowding around the voids: this local current crowding enhances the lateral void growth and coalescence. The correlation between the current density and the probability of void formation indicates that a threshold current density exists for the activation of void formation. There is a significant increase in the probability of void formation when the current density exceeds half of the maximum value

Dynamics of Void and its Shape in Redshift Space

We investigate the dynamics of a single spherical void embedded in a Friedmann-Lema\^itre universe, and analyze the void shape in the redshift space. We find that the void in the redshift space appears as an ellipse shape elongated in the direction of the line of sight (i.e., an opposite deformation to the Kaiser effect). Applying this result to observed void candidates at the redshift z~1-2, it may provide us with a new method to evaluate the cosmological parameters, in particular the value of a cosmological constant.Comment: 19 pages, 11 figure

Recent observations on cavitation and cavitation noise

This paper is primarily concerned with the acoustics of traveling bubble cavitation around foils or headforms. We begin with observations of individual bubbles and the acoustic signals they emit, our purpose being to identify areas of research which would enhance our understanding of the history of individual bubbles. Then we present some numerical integrations of the Rayleigh/Plesset equation for the same flows. The comparison is encouraging in terms of future synthesis of the noise by analytical means. Finally, bubble interaction effects which were omitted earlier are discussed and some recent analytical results including these effects are presented

Computer simulation of the phase diagram for a fluid confined in a fractal and disordered porous material

We present a grand canonical Monte Carlo simulation study of the phase diagram of a Lennard-Jones fluid adsorbed in a fractal and highly porous aerogel. The gel environment is generated from an off-lattice diffusion limited cluster-cluster aggregation process. Simulations have been performed with the multicanonical ensemble sampling technique. The biased sampling function has been obtained by histogram reweighting calculations. Comparing the confined and the bulk system liquid-vapor coexistence curves we observe a decrease of both the critical temperature and density in qualitative agreement with experiments and other Monte Carlo studies on Lennard-Jones fluids confined in random matrices of spheres. At variance with these numerical studies we do not observe upon confinement a peak on the liquid side of the coexistence curve associated with a liquid-liquid phase coexistence. In our case only a shouldering of the coexistence curve appears upon confinement. This shoulder can be associated with high density fluctuations in the liquid phase. The coexisting vapor and liquid phases in our system show a high degree of spatial disorder and inhomogeneity.Comment: 8 pages, 8 figures, to be published in Phys. Rev.

Study of intermetallic compound layer formation, growth and evaluation of shear strength of lead-free solder joints

Solder joints play a very important role in electronic products as the integrity of electronics packaging and assembly rests on the quality of these connections. The increasing demands for higher performance, lower cost, and miniaturisation in hand-held and consumer electronic products have led to the use of dense interconnections. This miniaturization trend means that solder joint reliability remains an important challenge with surface mount electronics assembly, especially those used in hostile environments, and applications such as automobile, aerospace and other safety critical operations. One of the most important factors which are known to affect solder joint reliability is the thickness of intermetallic compound (IMC) layer formed between the solder and the substrate. Although the formation of an IMC layer signifies good bonding between the solder and substrate, its main disadvantage is that it is also known to be the most brittle part of the solder joint. Thus as the miniaturisation trend continues, and solder joints become even smaller in size, the nature and impact of IMC layer thickness on solder joint reliability becomes even more of a concern with the introduction of new lead-free soldering. Other factors which are known to affect solder joint reliability include the bonding strength, the voiding percentage in joints, the size of the voids and their location within the joint. The work reported in this thesis on formation and growth of intermetallic compound layer, and evaluation of the shear strength of lead-free solder joints is divided into four main parts. The first part of the study is concerned with understanding of the effect of pad sizes on Inter-metallic compound layer formation and growth for lead-free solder joints. The second part concerns the study of the effect of temperature cycling and reflow profiles on intermetallic growth between Sn-Ag-Cu alloy and Cu substrate. The third part of the study concerns the investigation of the effect of reflow soldering profile optimization on solder volumes using design of experiment technique. The focus of the final part of the study is the investigation of the effect of Inter-metallic Compound thickness on shear strength of 1206 surface mount chip resistor. The results from the experimental work showed that the pad size has very little influence on the growth of the IMC. The result also shows that the growth of IMC depends on diffusion rate, temperature and time according to the power-law model; and that the IMC layer thickness is independent of pad size. The significance of this result is that with further reductions in joint size (with IMC layer thickness remaining the same), the ratio of the IMC layer thickness to solder joint size will increase and adversely impact the joint reliability. The work carried out on ageing temperatures and reflow profiles of Sn-Ag-Cu alloy and Cu substrate also showed the reaction-diffusion mechanism of intermetallic compound formation and growth in solder joints. The study also showed that the most significant factor in achieving lower IMC layer thickness and fine microstructures is the time to peak temperature of the reflow soldering process. The effect of IMC layer thickness on the shear strength of Sn-Ag-Cu solder joints was investigated. The relationship of shear strength, interfacial microstructures and fracture surfaces was considered. It is clear that formation of continuous Cu-Sn and SnNiCu layers are the reason for the weak interface strength. The results show that the shear strength of solder joints decreases with increasing ageing time. The results of this study have been disseminated through journal and conference publications and will be of interest to R&D personnel working in the area of high temperature electronics and in particular those working in the field of automotive electronics