An evolutionary approach to the extraction of object construction trees from 3D point clouds

In order to extract a construction tree from a finite set of points sampled on the surface of an object, we present an evolutionary algorithm that evolves set-theoretic expressions made of primitives fitted to the input point-set and modeling operations. To keep relatively simple trees, we use a penalty term in the objective function optimized by the evolutionary algorithm. We show with experiments successes but also limitations of this approach

Product assurance technology for custom LSI/VLSI electronics

The technology for obtaining custom integrated circuits from CMOS-bulk silicon foundries using a universal set of layout rules is presented. The technical efforts were guided by the requirement to develop a 3 micron CMOS test chip for the Combined Release and Radiation Effects Satellite (CRRES). This chip contains both analog and digital circuits. The development employed all the elements required to obtain custom circuits from silicon foundries, including circuit design, foundry interfacing, circuit test, and circuit qualification

Repair of metallic components using hybrid manufacturing

Many high-performance metal parts users extend the service of these damaged parts by employing repair technology. Hybrid manufacturing, which includes additive manufacturing (AM) and subtractive manufacturing, provides greater build capability, better accuracy, and surface finish for component repair. However, most repair processes still rely on manual operations, which are not satisfactory in terms of time, cost, reliability, and accuracy. This dissertation aims to improve the application of hybrid manufacturing for repairing metallic components by addressing the following three research topics. The first research topic is to investigate and develop an efficient best-fit and shape adaption algorithm for automating 3D models\u27 the alignment and defect reconstruction. A multi-feature fitting algorithm and cross-section comparison method are developed. The second research topic is to develop a smooth toolpath generation method for laser metal deposition to improve the deposition quality for metallic component fabrication and repair. Smooth connections or transitions in toolpath planning are achieved to provide a constant feedrate and controllable deposition idle time for each single deposition pass. The third research topic is to develop an automated repair process could efficiently obtain the spatial information of a worn component for defect detection, alignment, and 3D scanning with the integration of stereo vision and laser displacement sensor. This dissertation investigated and developed key technologies to improve the efficiency, repair quality, precision, and automation for the repair of metallic components using hybrid manufacturing. Moreover, the research results of this dissertation can benefit a wide range of industries, such as additive manufacturing, manufacturing and measurement automation, and part inspection --Abstract, page iv

Correlative Framework of Techniques for the Inspection, Evaluation, and Design of Micro-electronic Devices

Trillions of micro- and nano-electronic devices are manufactured every year. They service countless electronic systems across a diverse range of applications ranging from civilian, military, and medical sectors. Examples of these devices include: packaged and board-mounted semiconductor devices such as ceramic capacitors, CPUs, GPUs, DSPs, etc., biomedical implantable electrochemical devices such as pacemakers, defibrillators, and neural stimulators, electromechanical sensors such as MEMS/NEMS accelerometers and positioning systems and many others. Though a diverse collection of devices, they are unified by their length scale. Particularly, with respect to the ever-present objectives of device miniaturization and performance improvement. Pressures to meet these objectives have left significant room for the development of widely applicable inspection and evaluation techniques to accurately and reliably probe new and failed devices on an ever-shrinking length scale. Presented in this study is a framework of correlative, cross-modality microscopy workflows coupled with novel in-situ experimentation and testing, and computational reverse engineering and modeling methods, aimed at addressing the current and future challenges of evaluating micro- and nano-electronic devices. The current challenges are presented through a unique series of micro- and nano-electronic devices from a wide range of applications with ties to industrial relevance. Solutions were reached for the challenges and through the development of these workflows, they were successfully expanded to areas outside the immediate area of the original project. Limitations on techniques and capabilities were noted to contextualize the applicability of these workflows to other current and future challenges

Robust similarity registration technique for volumetric shapes represented by characteristic functions

This paper proposes a novel similarity registration technique for volumetric shapes implicitly represented by their characteristic functions (CFs). Here, the calculation of rotation parameters is considered as a spherical crosscorrelation problem and the solution is therefore found using the standard phase correlation technique facilitated by principal components analysis (PCA).Thus, fast Fourier transform (FFT) is employed to vastly improve efficiency and robustness. Geometric moments are then used for shape scale estimation which is independent from rotation and translation parameters. It is numericallydemonstrated that our registration method is able to handle shapes with various topologies and robust to noise and initial poses. Further validation of our method is performed by registering a lung database

4H-SiC Integrated circuits for high temperature and harsh environment applications

Silicon Carbide (SiC) has received a special attention in the last decades thanks to its superior electrical, mechanical and chemical proprieties. SiC is mostly used for applications where Silicon is limited, becoming a proper material for both unipolar and bipolar power device able to work under high power, high frequency and high temperature conditions. Aside from the outstanding theoretical and practical advantages still to be proved in SiC devices, the need for more accurate models for the design and optimization of these devices, along with the development of integrated circuits (ICs) on SiC is indispensable for the further success of modern power electronics. The design and development of SiC ICs has become a necessity since the high temperature operation of ICs is expected to enable important improvements in aerospace, automotive, energy production and other industrial systems. Due to the last impressive progresses in the manufacturing of high quality SiC substrates, the possibility of developing ICs applications is now feasible. SiC unipolar transistors, such as JFETs and MESFETs show a promising potential for digital ICs operating at high temperature and in harsh environments. The reported ICs on SiC have been realized so far with either a small number of elements, or with a low integration density. Therefore, this work demonstrates that by means of our SiC MESFET technology, multi-stage digital ICs fabrication containing a large number of 4H-SiC devices is feasible, accomplishing some of the most important ICs requirements. The ultimate objective is the development of SiC digital building blocks by transferring the Si CMOS topologies, hence demonstrating that the ICs SiC technology can be an important competitor of the Si ICs technology especially in application fields in which high temperature, high switching speed and harsh environment operations are required. The study starts with the current normally-on SiC MESFET CNM complete analysis of an already fabricated MESFET. It continues with the modeling and fabrication of a new planar-MESFET structure together with new epitaxial resistors specially suited for high temperature and high integration density. A novel device isolation technique never used on SiC before is approached. A fabrication process flow with three metal levels fully compatible with the CMOS technology is defined. An exhaustive experimental characterization at room and high temperature (300ºC) and Spice parameter extractions for both structures are performed. In order to design digital ICs on SiC with the previously developed devices, the current available topologies for normally-on transistors are discussed. The circuits design using Spice modeling, the process technology, the fabrication and the testing of the 4H-SiC MESFET elementary logic gates library at high temperature and high frequencies are performed. The MESFET logic gates behavior up to 300ºC is analyzed. Finally, this library has allowed us implementing complex multi-stage logic circuits with three metal levels and a process flow fully compatible with a CMOS technology. This study demonstrates that the development of important SiC digital blocks by transferring CMOS topologies (such as Master Slave Data Flip-Flop and Data-Reset Flip-Flop) is successfully achieved. Hence, demonstrating that our 4H-SiC MESFET technology enables the fabrication of mixed signal ICs capable to operate at high temperature (300ºC) and high frequencies (300kHz). We consider this study an important step ahead regarding the future ICs developments on SiC. Finally, experimental irradiations were performed on W-Schotthy diodes and mesa-MESFET devices (with the same Schottky gate than the planar SiC MESFET) in order to study their radiation hardness stability. The good radiation endurance of SiC Schottky-gate devices is proven. It is expected that the new developed devices with the same W-Schottky gate, to have a similar behavior in radiation rich environments.Postprint (published version

IMPEDANCE SPECTROSCOPY FOR INTERFACE CHARACTERIZATION IN SEMICONDUCTOR DEVICES

Impedance spectroscopy (IS) is a powerful tool to characterize devices since it allows to easily decouple the contribution of different interfaces existing in the device by only accessing the external terminals. The collected data are interpreted by means of equivalent electrical circuit. In this thesis, an automated procedure is developed to automatically extract lumped circuit parameters from impedance measured data, adding physical constraints deriving from experimental capacitance. In this work, Graphene-Silicon solar cells are characterized using impedance spectra, allowing to assess a new front contact technology that ameliorates these cells performance compared to the conventional. Impedance spectroscopy is also employed to characterize perovskite solar cells. The equivalent circuit coming from these devices allows to gain knowledge on perovskite layer and recombination mechanisms. An important focus of this thesis concerns capacitance versus voltage curves in forward bias region. This analysis is made using both experimental data and numerical results obtained from TCAD environment. This study is made on Metal-Semiconductor structure, finding the analytical expression of the forward bias capacitance peak and considering the effects of interface defects on capacitance behavior. The observation of multiple peaks arising in the high forward bias region suggests that interface properties are not uniform in the entire structure. Capacitance is also investigated in SiC MOSFETs devices permitting the TCAD model calibration and SiC/SiO2 interface characterization

Remanufacturing of precision metal components using additive manufacturing technology

Critical metallic components such as jet engine turbine blades and casting die/mold may be damaged after servicing for a period at harsh working environments such as elevated temperature and pressure, impact with foreign objects, wear, corrosion, and fatigue. Additive manufacturing has a promising application for the refurbishment of such high-costly parts by depositing materials at the damaged zone to restore the nominal geometry. However, several issues such as pre-processing of worn parts to assure the repairability, reconstructing the repair volume to generate a repair tool path for material deposition, and inspection of repaired parts are challenging. The current research aims to address crucial issues associated with component repair based on three research topics. The first topic is focusing on the development of pre-repair processing strategies which includes pre-repair machining to guarantee the damaged parts are ready for material deposition and pre-repair heat-treatment to restore the nominal mechanical properties. For this purpose, some damaged parts with varied defects were processed based on the proposed strategies. The second topic presents algorithms for obtaining the repair volume on damaged parts by comparing the damaged 3D models with the nominal models. Titanium compressor blades and die/mold were used as case studies to illustrate the damage detection and reconstructing algorithms. The third topic is the evaluation of repaired components through material inspection and mechanical testing to make sure the repair is successful. The current research contributes to metallic component remanufacturing by providing knowledge to solve key issues coupled with repair. Moreover, the research results could benefit a wide range of industries, such as aerospace, automotive, biomedical, and die casting --Abstract, page iv