Chaotic Attractor Hopping yields Logic Operations

Certain nonlinear systems can switch between dynamical attractors occupying different regions of phase space, under variation of parameters or initial states. In this work we exploit this feature to obtain reliable logic operations. With logic output 0 or 1 mapped to dynamical attractors bounded in distinct regions of phase space, and logic inputs encoded by a very small bias parameter, we explicitly demonstrate that the system hops consistently in response to an external input stream, operating effectively as a reliable logic gate. This system offers the advantage that very low-amplitude inputs yield highly amplified outputs. Additionally, different dynamical variables in the system yield complementary logic operations in parallel. Further, we show that in certain parameter regions noise aids the reliability of logic operations, and is actually necessary for obtaining consistent outputs. This leads us to a generalization of the concept of Logical Stochastic Resonance to attractors more complex than fixed point states, such as periodic or chaotic attractors. Lastly, the results are verified in electronic circuit experiments, demonstrating the robustness of the phenomena. So we have combined the research directions of Chaos Computing and Logical Stochastic Resonance here, and this approach has the potential to be realized in wide-ranging systems

Design of Discrete-time Chaos-Based Systems for Hardware Security Applications

Security of systems has become a major concern with the advent of technology. Researchers are proposing new security solutions every day in order to meet the area, power and performance specifications of the systems. The additional circuit required for security purposes can consume significant area and power. This work proposes a solution which utilizes discrete-time chaos-based logic gates to build a system which addresses multiple hardware security issues. The nonlinear dynamics of chaotic maps is leveraged to build a system that mitigates IC counterfeiting, IP piracy, overbuilding, disables hardware Trojan insertion and enables authentication of connecting devices (such as IoT and mobile). Chaos-based systems are also used to generate pseudo-random numbers for cryptographic applications.The chaotic map is the building block for the design of discrete-time chaos-based oscillator. The analog output of the oscillator is converted to digital value using a comparator in order to build logic gates. The logic gate is reconfigurable since different parameters in the circuit topology can be altered to implement multiple Boolean functions using the same system. The tuning parameters are control input, bifurcation parameter, iteration number and threshold voltage of the comparator. The proposed system is a hybrid between standard CMOS logic gates and reconfigurable chaos-based logic gates where original gates are replaced by chaos-based gates. The system works in two modes: logic locking and authentication. In logic locking mode, the goal is to ensure that the system achieves logic obfuscation in order to mitigate IC counterfeiting. The secret key for logic locking is made up of the tuning parameters of the chaotic oscillator. Each gate has 10-bit key which ensures that the key space is large which exponentially increases the computational complexity of any attack. In authentication mode, the aim of the system is to provide authentication of devices so that adversaries cannot connect to devices to learn confidential information. Chaos-based computing system is susceptible to process variation which can be leveraged to build a chaos-based PUF. The proposed system demonstrates near ideal PUF characteristics which means systems with large number of primary outputs can be used for authenticating devices

Chaogates: morphing logic gates that exploit dynamical patterns

Chaotic systems can yield a wide variety of patterns. Here we use this feature to generate all possible fundamental logic gate functions. This forms the basis of the design of a dynamical computing device, a chaogate, that can be rapidly morphed to become any desired logic gate. Here we review the basic concepts underlying this and present an extension of the formalism to include asymmetric logic functions