Fully-deterministic execution of IEC-61499 models for Distributed Avionics Applications

© 2018 by the authors. The development of time-critical Distributed Avionics Applications (DAAs) pushes beyond the limit of existing modeling methodologies to design dependable systems. Aerospace and industrial automation entail high-integrity applications where execution time is essential for dependability. This tempts us to use modeling technologies from one domain in another. The challenge is to demonstrate that they can be effectively used across domains whilst assuring temporally dependable applications. This paper shows that an IEC61499-modeled DAA can satisfy temporal dependability requirements as to end-to-end flow latency when it is properly scheduled and realized in a fully deterministic avionics platform that entails Integrated Modular Avionics (IMA) computation along with Time-Triggered Protocol (TTP) communication. Outcomes from the execution design of an IEC61499-based DAA model for an IMA-TTP platform are used to check runtime correctness through DAA control stability. IEC 61499 is a modeling standard for industrial automation, and it is meant to facilitate distribution and reconfiguration of applications. The DAA case study is a Distributed Fluid Control System (DFCS) for the Airbus-A380 fuel system. Latency analysis results from timing metrics as well as closed-loop control simulation results are presented. Experimental outcomes suggest that an IEC61499-based DFCS model can achieve desired runtime latency for temporal dependability when executed in an IMA-TTP platform. Concluding remarks and future research direction are also discussed

parMERASA Multi-Core Execution of Parallelised Hard Real-Time Applications Supporting Analysability

International audienceEngineers who design hard real-time embedded systems express a need for several times the performance available today while keeping safety as major criterion. A breakthrough in performance is expected by parallelizing hard real-time applications and running them on an embedded multi-core processor, which enables combining the requirements for high-performance with timing-predictable execution. parMERASA will provide a timing analyzable system of parallel hard real-time applications running on a scalable multicore processor. parMERASA goes one step beyond mixed criticality demands: It targets future complex control algorithms by parallelizing hard real-time programs to run on predictable multi-/many-core processors. We aim to achieve a breakthrough in techniques for parallelization of industrial hard real-time programs, provide hard real-time support in system software, WCET analysis and verification tools for multi-cores, and techniques for predictable multi-core designs with up to 64 cores

Analysis and Evaluation of a Wired/Wireless Hybrid Architecture for Distributed Control Systems With Mobility Requirements

Wireless communications offer significant benefits over wired communications, which has increased their popularity in industrial applications. Nevertheless, the existing wireless standard technologies do not satisfy the requirements demanded by the most critical industrial applications and thus, wired communications cannot be directly replaced by wireless solutions. Moreover, the inclusion of movable nodes in the network brings new challenges, such as the handover mechanism. In this paper, a hybrid wired/wireless architecture designed for industrial control applications is proposed. To control the wired network, a time-sensitive network (TSN) is used and to control the wireless network a medium access control (MAC) protocol is designed. In order to communicate both networks, a bridge that acts as a deterministic access point (AP) with real-time features is also proposed. One of the fundamental parts of the proposed architecture is that it can be used in applications with mobility requirements. Hence, a soft-handover algorithm is designed which guarantees uninterrupted communication during its execution without the need for a second radio interface and with reduced growth in network overhead. The proposed architecture is evaluated in order to assess its performance. This paper extends our previous work, including both a theoretical analysis to determine the delay bounds of the proposed architecture and a comparison between the performances of the proposed handover algorithm with other algorithms proposed in the literature. The evaluation has been carried out through OMNeT++ simulations. The results demonstrate the superiority of the proposed handover algorithm compared with other state-of-the-art solutions

parMERASA – multicore execution of parallelised hard real-time applications supporting analysability

Abstract-Engineers who design hard real-time embedded systems express a need for several times the performance available today while keeping safety as major criterion. A breakthrough in performance is expected by parallelizing hard real-time applications and running them on an embedded multi-core processor, which enables combining the requirements for high-performance with timing-predictable execution. parMERASA will provide a timing analyzable system of parallel hard real-time applications running on a scalable multicore processor. parMERASA goes one step beyond mixed criticality demands: It targets future complex control algorithms by parallelizing hard real-time programs to run on predictable multi-/many-core processors. We aim to achieve a breakthrough in techniques for parallelization of industrial hard real-time programs, provide hard real-time support in system software, WCET analysis and verification tools for multi-cores, and techniques for predictable multi-core designs with up to 64 cores