Measurements, Models, Systems and Design

531 s.

System-Level Design of All-Digital LTE / LTE-A Transmitter Hardware

This thesis presents a detailed system-level analysis of an all-digital transmitter hardware based on the Direct-Digital RF-Modulator (DDRM). The purpose of the presented analysis is to evaluate whether this particular transmitter architecture is suitable to be used in LTE / LTE-A mobile phones. The DDRM architecture is based on the Radio Frequency Digital-to-Analog Converter (RF-DAC), whose system-level characteristics are investigated in this work through mathematical analysis and MATLAB simulations. In particular, a new analytical model for the timing error in the distributed upconversion is developed and verified. Moreover, this thesis reviews the LTE and LTE-A standards, and describes how a baseband environment for signal generation/demodulation can be implemented in MATLAB. The presented system enables much more flexibility with respect to current commercial softwares like Agilent Signal Studio. Simulation results show that the most challenging specification to meet is the out-of-band noise floor, because of the stringent linearity and timing requirements posed on the RF-DAC. This suggests that new means of reducing the out-of-band noise in all-digital transmitters should be researched, in order not to make their design more complicated than for their analog counterpart

Interrogation of Optical Fiber Sensors for Civil Engineering Applications using Widely Tunable Laser

Předložená disertační práce zkoumá možnosti použití nového typu polovodičového MGY- Laseru elektricky laditelného v širokém spektrálním rozsahu a zabývá se možnostmi jeho nasazení v optovláknové senzorové síti založené na metodě FBG (Fiber Bragg Grating). Výzkum byl započat komplexními dlouhodobými testy reálného měřícího scénáře z oblasti stavebnictví, sestaveného pro účely ověření limitujících aspektů současných technik. Inženýrské aplikace nabízejí velké množství vzájemně se vylučujících požadavků pro návrh strukturálních senzorových systémů. Tyto požadavky jsou sdíleny mnoha dalšími technologickými oblastmi, což přispívá k vysokému stupni univerzálnosti použití dosažených výsledků. Na základě posouzení stavu současné techniky a aplikačních požadavků byly v práci nejprve identifikovány aspekty, které mají být výzkumem zlepšeny. V dalším kroku byl detailně charakterizován MG-Y laser Syntune/Finisar S7500. Na základě dat získaných měřením byla zkoumána nová metoda spojitého řízená vlnové délky záření laseru. Provedené experimenty vedly nejen k návrhu nového způsobu spojité regulace vlnové délky ale také k vytvoření prostředků pro vlastní kalibraci systému na základě jeho vnitřních vlastností (podélných módů rezonátoru).This dissertation investigates the use of a MG-Y-Laser, a novel type of semiconductor laser that is electrically tunable over a wide spectral range, for the interrogation of Fiber Bragg Grating (FBG) based fiber-optical sensing networks. The research started with a complex long-term test of a real world measurement scenario from the field of civil engineering to elucidate limiting aspects of state of the art techniques. Civil engineering applications pose a multitude of mutually exclusive challenges toward structural sensing systems. These challenges are shared by many other fields of technology, making the results to a large degree universally applicable. Following an assessment of the state of art and the application requirements, the aspects to be improved by the research were identified. A Syntune/Finisar S7500 MG-Y-Laser device was then thoroughly characterized. Based on the gathered measurement data, novel tuning methods aimed at wavelength continuous control were investigated. This led to the invention of a tuning method that not only allows wavelength continuous control but also provides a means of self calibration based on intrinsic properties (longitudinal cavity modes) of the device.

Potential and Challenges of Analog Reconfigurable Computation in Modern and Future CMOS

In this work, the feasibility of the floating-gate technology in analog computing platforms in a scaled down general-purpose CMOS technology is considered. When the technology is scaled down the performance of analog circuits tends to get worse because the process parameters are optimized for digital transistors and the scaling involves the reduction of supply voltages. Generally, the challenge in analog circuit design is that all salient design metrics such as power, area, bandwidth and accuracy are interrelated. Furthermore, poor flexibility, i.e. lack of reconfigurability, the reuse of IP etc., can be considered the most severe weakness of analog hardware. On this account, digital calibration schemes are often required for improved performance or yield enhancement, whereas high flexibility/reconfigurability can not be easily achieved. Here, it is discussed whether it is possible to work around these obstacles by using floating-gate transistors (FGTs), and analyze problems associated with the practical implementation. FGT technology is attractive because it is electrically programmable and also features a charge-based built-in non-volatile memory. Apart from being ideal for canceling the circuit non-idealities due to process variations, the FGTs can also be used as computational or adaptive elements in analog circuits. The nominal gate oxide thickness in the deep sub-micron (DSM) processes is too thin to support robust charge retention and consequently the FGT becomes leaky. In principle, non-leaky FGTs can be implemented in a scaled down process without any special masks by using “double”-oxide transistors intended for providing devices that operate with higher supply voltages than general purpose devices. However, in practice the technology scaling poses several challenges which are addressed in this thesis. To provide a sufficiently wide-ranging survey, six prototype chips with varying complexity were implemented in four different DSM process nodes and investigated from this perspective. The focus is on non-leaky FGTs, but the presented autozeroing floating-gate amplifier (AFGA) demonstrates that leaky FGTs may also find a use. The simplest test structures contain only a few transistors, whereas the most complex experimental chip is an implementation of a spiking neural network (SNN) which comprises thousands of active and passive devices. More precisely, it is a fully connected (256 FGT synapses) two-layer spiking neural network (SNN), where the adaptive properties of FGT are taken advantage of. A compact realization of Spike Timing Dependent Plasticity (STDP) within the SNN is one of the key contributions of this thesis. Finally, the considerations in this thesis extend beyond CMOS to emerging nanodevices. To this end, one promising emerging nanoscale circuit element - memristor - is reviewed and its applicability for analog processing is considered. Furthermore, it is discussed how the FGT technology can be used to prototype computation paradigms compatible with these emerging two-terminal nanoscale devices in a mature and widely available CMOS technology.Siirretty Doriast

Design considerations for a monolithic, GaAs, dual-mode, QPSK/QASK, high-throughput rate transceiver

A monolithic, GaAs, dual mode, quadrature amplitude shift keying and quadrature phase shift keying transceiver with one and two billion bits per second data rate is being considered to achieve a low power, small and ultra high speed communication system for satellite as well as terrestrial purposes. Recent GaAs integrated circuit achievements are surveyed and their constituent device types are evaluated. Design considerations, on an elemental level, of the entire modem are further included for monolithic realization with practical fabrication techniques. Numerous device types, with practical monolithic compatability, are used in the design of functional blocks with sufficient performances for realization of the transceiver

A Software Radio Based Ionosonde Using GNU Radio

ABSTRACT The Canadian Advanced Digital Ionosonde (CADI) is used to study and investigate the structure and motion o f the ionosphere. The main components of CADI are implemented in microcontroller based digital logic. Due to the increased speed and reconfiguration capability of modem FPGAs (Field Programmable Gate Arrays) and ADCs (Analog-Digital Converters), this project is aimed to develop an ionosonde based on an open source radio software platform, GNU Radio, in conjunction with its hardware support, the Universal Software Radio Peripheral (USRP). The lowest cost FPGA, Cyclone EP1C12Q240C8 is selected to control Analog Digital Converter to transmit a HF (High Frequency) signal and to decimate and down convert the signal at the receiver side, which is controlled by a USB controller, and to load the FPGA configuration image through GNU radio platform. To obtain a good range resolution and low noise level, the signal is modulated by a 113-bit Legendre sequence with a preamble packed at front for synchronization. Based on the experimental results, the discussion and conclusion are included

Digital System Design - Use of Microcontroller

Embedded systems are today, widely deployed in just about every piece of machinery from toasters to spacecraft. Embedded system designers face many challenges. They are asked to produce increasingly complex systems using the latest technologies, but these technologies are changing faster than ever. They are asked to produce better quality designs with a shorter time-to-market. They are asked to implement increasingly complex functionality but more importantly to satisfy numerous other constraints. To achieve the current goals of design, the designer must be aware with such design constraints and more importantly, the factors that have a direct effect on them.One of the challenges facing embedded system designers is the selection of the optimum processor for the application in hand; single-purpose, general-purpose or application specific. Microcontrollers are one member of the family of the application specific processors.The book concentrates on the use of microcontroller as the embedded system?s processor, and how to use it in many embedded system applications. The book covers both the hardware and software aspects needed to design using microcontroller.The book is ideal for undergraduate students and also the engineers that are working in the field of digital system design.Contents• Preface;• Process design metrics;• A systems approach to digital system design;• Introduction to microcontrollers and microprocessors;• Instructions and Instruction sets;• Machine language and assembly language;• System memory; Timers, counters and watchdog timer;• Interfacing to local devices / peripherals;• Analogue data and the analogue I/O subsystem;• Multiprocessor communications;• Serial Communications and Network-based interfaces

Computer Science & Technology Series : XVI Argentine Congress of Computer Science - Selected papers

CACIC’10 was the sixteenth Congress in the CACIC series. It was organized by the School of Computer Science of the University of Moron. The Congress included 10 Workshops with 104 accepted papers, 1 main Conference, 4 invited tutorials, different meetings related with Computer Science Education (Professors, PhD students, Curricula) and an International School with 5 courses. (http://www.cacic2010.edu.ar/). CACIC 2010 was organized following the traditional Congress format, with 10 Workshops covering a diversity of dimensions of Computer Science Research. Each topic was supervised by a committee of three chairs of different Universities. The call for papers attracted a total of 195 submissions. An average of 2.6 review reports were collected for each paper, for a grand total of 507 review reports that involved about 300 different reviewers. A total of 104 full papers were accepted and 20 of them were selected for this book.Red de Universidades con Carreras en Informática (RedUNCI