837 research outputs found

    On the BER of Multiple-Input Multiple-Output Underwater Wireless Optical Communication Systems

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    In this paper we analyze and investigate the bit error rate (BER) performance of multiple-input multiple-output underwater wireless optical communication (MIMO-UWOC) systems. In addition to exact BER expressions, we also obtain an upper bound on the system BER. To effectively estimate the BER expressions, we use Gauss-Hermite quadrature formula as well as approximation to the sum of log-normal random variables. We confirm the accuracy of our analytical expressions by evaluating the BER through photon-counting approach. Our simulation results show that MIMO technique can mitigate the channel turbulence-induced fading and consequently, can partially extend the viable communication range, especially for channels with stronger turbulence

    Electronic Photonic Integrated Circuits and Control Systems

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    Photonic systems can operate at frequencies several orders of magnitude higher than electronics, whereas electronics offers extremely high density and easily built memories. Integrated photonic-electronic systems promise to combine advantage of both, leading to advantages in accuracy, reconfigurability and energy efficiency. This work concerns of hybrid and monolithic electronic-photonic system design. First, a high resolution voltage supply to control the thermooptic photonic chip for time-bin entanglement is described, in which the electronics system controller can be scaled with more number of power channels and the ability to daisy-chain the devices. Second, a system identification technique embedded with feedback control for wavelength stabilization and control model in silicon nitride photonic integrated circuits is proposed. Using the system, the wavelength in thermooptic device can be stabilized in dynamic environment. Third, the generation of more deterministic photon sources with temporal multiplexing established using field programmable gate arrays (FPGAs) as controller photonic device is demonstrated for the first time. The result shows an enhancement to the single photon output probability without introducing additional multi-photon noise. Fourth, multiple-input and multiple-output (MIMO) control of a silicon nitride thermooptic photonic circuits incorporating Mach Zehnder interferometers (MZIs) is demonstrated for the first time using a dual proportional integral reference tracking technique. The system exhibits improved performance in term of control accuracy by reducing wavelength peak drift due to internal and external disturbances. Finally, a monolithically integrated complementary metal oxide semiconductor (CMOS) nanophotonic segmented transmitter is characterized. With segmented design, the monolithic Mach Zehnder modulator (MZM) shows a low link sensitivity and low insertion loss with driver flexibility

    Efficient dynamic modeling of reflective semiconductor optical amplifier

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    “Copyright © [2013] IEEE. Reprinted from IEEE Journal of Selected Topics in Quantum Electronics. ISSN: 1932-4553. This material is posted here with permission of the IEEE. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to [email protected]. By choosing to view this document, you agree to all provisions of the copyright laws protecting it.”RSOA is considered a strong candidate to play an important role in realizing the next generation WDM PON, based on the wavelength reuse concept. Therefore, accurate and efficient modeling of RSOA is of significant importance. We present a time-domain wideband model for simulation of spatial and temporal distribution of photons and carriers in a bulk RSOA. A trade-off between the accuracy and the computational efficiency of the model is studied. Multi-objective genetic algorithm is utilized for parameter extraction. Experimental validation has been performed for continuous wave input, NRZ and QPSK signaling pulses up to 40 Gb/s of bit rate, in both amplification and remodulation regimes. Saturation, noise, chirp and signal broadening are successfully predicted, while reducing the computational time compared to other wideband models

    NELIOTA: The wide-field, high-cadence lunar monitoring system at the prime focus of the Kryoneri telescope

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    We present the technical specifications and first results of the ESA-funded, lunar monitoring project "NELIOTA" (NEO Lunar Impacts and Optical TrAnsients) at the National Observatory of Athens, which aims to determine the size-frequency distribution of small Near-Earth Objects (NEOs) via detection of impact flashes on the surface of the Moon. For the purposes of this project a twin camera instrument was specially designed and installed at the 1.2 m Kryoneri telescope utilizing the fast-frame capabilities of scientific Complementary Metal-Oxide Semiconductor detectors (sCMOS). The system provides a wide field-of-view (17.0' ×\times 14.4') and simultaneous observations in two photometric bands (R and I), reaching limiting magnitudes of 18.7 mag in 10 sec in both bands at a 2.5 signal-to-noise level. This makes it a unique instrument that can be used for the detection of NEO impacts on the Moon, as well as for any astronomy projects that demand high-cadence multicolor observations. The wide field-of-view ensures that a large portion of the Moon is observed, while the simultaneous, high-cadence, monitoring in two photometric bands makes possible, for the first time, the determination of the temperatures of the impacts on the Moon's surface and the validation of the impact flashes from a single site. Considering the varying background level on the Moon's surface we demonstrate that the NELIOTA system can detect NEO impact flashes at a 2.5 signal-to-noise level of ~12.4 mag in the I-band and R-band for observations made at low lunar phases ~0.1. We report 31 NEO impact flashes detected during the first year of the NELIOTA campaign. The faintest flash was at 11.24 mag in the R-band (about two magnitudes fainter than ever observed before) at lunar phase 0.32. Our observations suggest a detection rate of 1.96×1071.96 \times 10^{-7} events km2h1km^{-2} h^{-1}.Comment: Accepted for publication in A&

    Broadcast-oriented wireless network-on-chip : fundamentals and feasibility

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    Premi extraordinari doctorat UPC curs 2015-2016, àmbit Enginyeria de les TICRecent years have seen the emergence and ubiquitous adoption of Chip Multiprocessors (CMPs), which rely on the coordinated operation of multiple execution units or cores. Successive CMP generations integrate a larger number of cores seeking higher performance with a reasonable cost envelope. For this trend to continue, however, important scalability issues need to be solved at different levels of design. Scaling the interconnect fabric is a grand challenge by itself, as new Network-on-Chip (NoC) proposals need to overcome the performance hurdles found when dealing with the increasingly variable and heterogeneous communication demands of manycore processors. Fast and flexible NoC solutions are needed to prevent communication become a performance bottleneck, situation that would severely limit the design space at the architectural level and eventually lead to the use of software frameworks that are slow, inefficient, or less programmable. The emergence of novel interconnect technologies has opened the door to a plethora of new NoCs promising greater scalability and architectural flexibility. In particular, wireless on-chip communication has garnered considerable attention due to its inherent broadcast capabilities, low latency, and system-level simplicity. Most of the resulting Wireless Network-on-Chip (WNoC) proposals have set the focus on leveraging the latency advantage of this paradigm by creating multiple wireless channels to interconnect far-apart cores. This strategy is effective as the complement of wired NoCs at moderate scales, but is likely to be overshadowed at larger scales by technologies such as nanophotonics unless bandwidth is unrealistically improved. This dissertation presents the concept of Broadcast-Oriented Wireless Network-on-Chip (BoWNoC), a new approach that attempts to foster the inherent simplicity, flexibility, and broadcast capabilities of the wireless technology by integrating one on-chip antenna and transceiver per processor core. This paradigm is part of a broader hybrid vision where the BoWNoC serves latency-critical and broadcast traffic, tightly coupled to a wired plane oriented to large flows of data. By virtue of its scalable broadcast support, BoWNoC may become the key enabler of a wealth of unconventional hardware architectures and algorithmic approaches, eventually leading to a significant improvement of the performance, energy efficiency, scalability and programmability of manycore chips. The present work aims not only to lay the fundamentals of the BoWNoC paradigm, but also to demonstrate its viability from the electronic implementation, network design, and multiprocessor architecture perspectives. An exploration at the physical level of design validates the feasibility of the approach at millimeter-wave bands in the short term, and then suggests the use of graphene-based antennas in the terahertz band in the long term. At the link level, this thesis provides an insightful context analysis that is used, afterwards, to drive the design of a lightweight protocol that reliably serves broadcast traffic with substantial latency improvements over state-of-the-art NoCs. At the network level, our hybrid vision is evaluated putting emphasis on the flexibility provided at the network interface level, showing outstanding speedups for a wide set of traffic patterns. At the architecture level, the potential impact of the BoWNoC paradigm on the design of manycore chips is not only qualitatively discussed in general, but also quantitatively assessed in a particular architecture for fast synchronization. Results demonstrate that the impact of BoWNoC can go beyond simply improving the network performance, thereby representing a possible game changer in the manycore era.Avenços en el disseny de multiprocessadors han portat a una àmplia adopció dels Chip Multiprocessors (CMPs), que basen el seu potencial en la operació coordinada de múltiples nuclis de procés. Generacions successives han anat integrant més nuclis en la recerca d'alt rendiment amb un cost raonable. Per a que aquesta tendència continuï, però, cal resoldre importants problemes d'escalabilitat a diferents capes de disseny. Escalar la xarxa d'interconnexió és un gran repte en ell mateix, ja que les noves propostes de Networks-on-Chip (NoC) han de servir un tràfic eminentment variable i heterogeni dels processadors amb molts nuclis. Són necessàries solucions ràpides i flexibles per evitar que les comunicacions dins del xip es converteixin en el pròxim coll d'ampolla de rendiment, situació que limitaria en gran mesura l'espai de disseny a nivell d'arquitectura i portaria a l'ús d'arquitectures i models de programació lents, ineficients o poc programables. L'aparició de noves tecnologies d'interconnexió ha possibilitat la creació de NoCs més flexibles i escalables. En particular, la comunicació intra-xip sense fils ha despertat un interès considerable en virtut de les seva baixa latència, simplicitat, i bon rendiment amb tràfic broadcast. La majoria de les Wireless NoC (WNoC) proposades fins ara s'han centrat en aprofitar l'avantatge en termes de latència d'aquest nou paradigma creant múltiples canals sense fils per interconnectar nuclis allunyats entre sí. Aquesta estratègia és efectiva per complementar a NoCs clàssiques en escales mitjanes, però és probable que altres tecnologies com la nanofotònica puguin jugar millor aquest paper a escales més grans. Aquesta tesi presenta el concepte de Broadcast-Oriented WNoC (BoWNoC), un nou enfoc que intenta rendibilitzar al màxim la inherent simplicitat, flexibilitat, i capacitats broadcast de la tecnologia sense fils integrant una antena i transmissor/receptor per cada nucli del processador. Aquest paradigma forma part d'una visió més àmplia on un BoWNoC serviria tràfic broadcast i urgent, mentre que una xarxa convencional serviria fluxos de dades més pesats. En virtut de la escalabilitat i del seu suport broadcast, BoWNoC podria convertir-se en un element clau en una gran varietat d'arquitectures i algoritmes poc convencionals que milloressin considerablement el rendiment, l'eficiència, l'escalabilitat i la programabilitat de processadors amb molts nuclis. El present treball té com a objectius no només estudiar els aspectes fonamentals del paradigma BoWNoC, sinó també demostrar la seva viabilitat des dels punts de vista de la implementació, i del disseny de xarxa i arquitectura. Una exploració a la capa física valida la viabilitat de l'enfoc usant tecnologies longituds d'ona milimètriques en un futur proper, i suggereix l'ús d'antenes de grafè a la banda dels terahertz ja a més llarg termini. A capa d'enllaç, la tesi aporta una anàlisi del context de l'aplicació que és, més tard, utilitzada per al disseny d'un protocol d'accés al medi que permet servir tràfic broadcast a baixa latència i de forma fiable. A capa de xarxa, la nostra visió híbrida és avaluada posant èmfasi en la flexibilitat que aporta el fet de prendre les decisions a nivell de la interfície de xarxa, mostrant grans millores de rendiment per una àmplia selecció de patrons de tràfic. A nivell d'arquitectura, l'impacte que el concepte de BoWNoC pot tenir sobre el disseny de processadors amb molts nuclis no només és debatut de forma qualitativa i genèrica, sinó també avaluat quantitativament per una arquitectura concreta enfocada a la sincronització. Els resultats demostren que l'impacte de BoWNoC pot anar més enllà d'una millora en termes de rendiment de xarxa; representant, possiblement, un canvi radical a l'era dels molts nuclisAward-winningPostprint (published version

    Broadcast-oriented wireless network-on-chip : fundamentals and feasibility

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    Premi extraordinari doctorat UPC curs 2015-2016, àmbit Enginyeria de les TICRecent years have seen the emergence and ubiquitous adoption of Chip Multiprocessors (CMPs), which rely on the coordinated operation of multiple execution units or cores. Successive CMP generations integrate a larger number of cores seeking higher performance with a reasonable cost envelope. For this trend to continue, however, important scalability issues need to be solved at different levels of design. Scaling the interconnect fabric is a grand challenge by itself, as new Network-on-Chip (NoC) proposals need to overcome the performance hurdles found when dealing with the increasingly variable and heterogeneous communication demands of manycore processors. Fast and flexible NoC solutions are needed to prevent communication become a performance bottleneck, situation that would severely limit the design space at the architectural level and eventually lead to the use of software frameworks that are slow, inefficient, or less programmable. The emergence of novel interconnect technologies has opened the door to a plethora of new NoCs promising greater scalability and architectural flexibility. In particular, wireless on-chip communication has garnered considerable attention due to its inherent broadcast capabilities, low latency, and system-level simplicity. Most of the resulting Wireless Network-on-Chip (WNoC) proposals have set the focus on leveraging the latency advantage of this paradigm by creating multiple wireless channels to interconnect far-apart cores. This strategy is effective as the complement of wired NoCs at moderate scales, but is likely to be overshadowed at larger scales by technologies such as nanophotonics unless bandwidth is unrealistically improved. This dissertation presents the concept of Broadcast-Oriented Wireless Network-on-Chip (BoWNoC), a new approach that attempts to foster the inherent simplicity, flexibility, and broadcast capabilities of the wireless technology by integrating one on-chip antenna and transceiver per processor core. This paradigm is part of a broader hybrid vision where the BoWNoC serves latency-critical and broadcast traffic, tightly coupled to a wired plane oriented to large flows of data. By virtue of its scalable broadcast support, BoWNoC may become the key enabler of a wealth of unconventional hardware architectures and algorithmic approaches, eventually leading to a significant improvement of the performance, energy efficiency, scalability and programmability of manycore chips. The present work aims not only to lay the fundamentals of the BoWNoC paradigm, but also to demonstrate its viability from the electronic implementation, network design, and multiprocessor architecture perspectives. An exploration at the physical level of design validates the feasibility of the approach at millimeter-wave bands in the short term, and then suggests the use of graphene-based antennas in the terahertz band in the long term. At the link level, this thesis provides an insightful context analysis that is used, afterwards, to drive the design of a lightweight protocol that reliably serves broadcast traffic with substantial latency improvements over state-of-the-art NoCs. At the network level, our hybrid vision is evaluated putting emphasis on the flexibility provided at the network interface level, showing outstanding speedups for a wide set of traffic patterns. At the architecture level, the potential impact of the BoWNoC paradigm on the design of manycore chips is not only qualitatively discussed in general, but also quantitatively assessed in a particular architecture for fast synchronization. Results demonstrate that the impact of BoWNoC can go beyond simply improving the network performance, thereby representing a possible game changer in the manycore era.Avenços en el disseny de multiprocessadors han portat a una àmplia adopció dels Chip Multiprocessors (CMPs), que basen el seu potencial en la operació coordinada de múltiples nuclis de procés. Generacions successives han anat integrant més nuclis en la recerca d'alt rendiment amb un cost raonable. Per a que aquesta tendència continuï, però, cal resoldre importants problemes d'escalabilitat a diferents capes de disseny. Escalar la xarxa d'interconnexió és un gran repte en ell mateix, ja que les noves propostes de Networks-on-Chip (NoC) han de servir un tràfic eminentment variable i heterogeni dels processadors amb molts nuclis. Són necessàries solucions ràpides i flexibles per evitar que les comunicacions dins del xip es converteixin en el pròxim coll d'ampolla de rendiment, situació que limitaria en gran mesura l'espai de disseny a nivell d'arquitectura i portaria a l'ús d'arquitectures i models de programació lents, ineficients o poc programables. L'aparició de noves tecnologies d'interconnexió ha possibilitat la creació de NoCs més flexibles i escalables. En particular, la comunicació intra-xip sense fils ha despertat un interès considerable en virtut de les seva baixa latència, simplicitat, i bon rendiment amb tràfic broadcast. La majoria de les Wireless NoC (WNoC) proposades fins ara s'han centrat en aprofitar l'avantatge en termes de latència d'aquest nou paradigma creant múltiples canals sense fils per interconnectar nuclis allunyats entre sí. Aquesta estratègia és efectiva per complementar a NoCs clàssiques en escales mitjanes, però és probable que altres tecnologies com la nanofotònica puguin jugar millor aquest paper a escales més grans. Aquesta tesi presenta el concepte de Broadcast-Oriented WNoC (BoWNoC), un nou enfoc que intenta rendibilitzar al màxim la inherent simplicitat, flexibilitat, i capacitats broadcast de la tecnologia sense fils integrant una antena i transmissor/receptor per cada nucli del processador. Aquest paradigma forma part d'una visió més àmplia on un BoWNoC serviria tràfic broadcast i urgent, mentre que una xarxa convencional serviria fluxos de dades més pesats. En virtut de la escalabilitat i del seu suport broadcast, BoWNoC podria convertir-se en un element clau en una gran varietat d'arquitectures i algoritmes poc convencionals que milloressin considerablement el rendiment, l'eficiència, l'escalabilitat i la programabilitat de processadors amb molts nuclis. El present treball té com a objectius no només estudiar els aspectes fonamentals del paradigma BoWNoC, sinó també demostrar la seva viabilitat des dels punts de vista de la implementació, i del disseny de xarxa i arquitectura. Una exploració a la capa física valida la viabilitat de l'enfoc usant tecnologies longituds d'ona milimètriques en un futur proper, i suggereix l'ús d'antenes de grafè a la banda dels terahertz ja a més llarg termini. A capa d'enllaç, la tesi aporta una anàlisi del context de l'aplicació que és, més tard, utilitzada per al disseny d'un protocol d'accés al medi que permet servir tràfic broadcast a baixa latència i de forma fiable. A capa de xarxa, la nostra visió híbrida és avaluada posant èmfasi en la flexibilitat que aporta el fet de prendre les decisions a nivell de la interfície de xarxa, mostrant grans millores de rendiment per una àmplia selecció de patrons de tràfic. A nivell d'arquitectura, l'impacte que el concepte de BoWNoC pot tenir sobre el disseny de processadors amb molts nuclis no només és debatut de forma qualitativa i genèrica, sinó també avaluat quantitativament per una arquitectura concreta enfocada a la sincronització. Els resultats demostren que l'impacte de BoWNoC pot anar més enllà d'una millora en termes de rendiment de xarxa; representant, possiblement, un canvi radical a l'era dels molts nuclisAward-winningPostprint (published version

    Performance improvement of SS-WDM passive optical networks using semiconductor optical amplifiers: Modeling and experiment

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    Les sources incohérentes sont proposées comme alternatives aux lasers stabilisés en longueur d'onde pour réduire le coût des réseaux optiques passifs utilisant le multiplexage par longueur d'onde découpée dans le spectre (SS-WDM PONs). À cause de leur nature incohérente, ces sources génèrent au récepteur un large bruit d'intensité. Ce bruit limite l'efficacité spectrale et/ou le taux binaire pouvant être achevé. Cette thèse étudie l'utilisation des amplificateurs optique à semi-conducteur SOAs pour nettoyer le bruit d'intensité. De plus, lors de cette thèse, nous explorons les outils numériques et expérimentaux qui nous permettent d'analyser les performances des SOAs dans le cadre de systèmes de communication multi-canaux, incluant le SS-WDM. Nous présentons des modèles mathématiques pour le bruit d'intensité, ce bruit étant celui qui limite les performances des systèmes de communication utilisant des sources incohérentes. Nous discutons les dynamiques complexes des SOAs et présentons les équations qui gouvernent l'évolution des porteurs de charges dans ces amplificateurs. Nous identifions et soulignons l'effet des paramètres les plus importants, qui affectent le processus ainsi que la dynamique de nettoyage du bruit d'intensité. Nous passons en revue, les différentes techniques de nettoyage de bruit avec les SOAs, qui ont démontré les meilleurs résultats connus. De plus, nous effectuons une revue de littérature poussée pour ce qui a attrait au problème de post-filtrage lorsque le SOA est placé au transmetteur, avant la modulation. Notre première contribution pendant ce travail de recherche est de démontrer, en utilisant l'intermodulation de gain d'un SOA au récepteur pour convertir le signal incohérent en laser cohérent, une amélioration significative du taux d'erreur binaire BER. Cette méthode est spectralement efficace, d'autant plus qu'elle ne souffre point la limitation occasionnée par le post-filtrage au récepteur. En contre partie elle nécessite un ample budget de puissance qui doit assurer une saturation suffisante de l'amplificateur au récepteur. Une source laser est aussi nécessaire au récepteur. Ceci est un inconvénient, même si une telle source n'ait pas besoin d'une quelconque stabilisation. Pour contourner le problème causé par le post-filtrage quand le SOA est au transmetteur, nous proposons un nouveau récepteur pour les systèmes de communication WDM, qui permet de mieux garder le nettoyage de bruit, et ce malgré le filtrage optique au récepteur. La nouvelle méthode consiste en un détecteur balancé utilisé au récepteur: d'un bord, tous les canaux sont détectés sans distinction. De l'autre, le signal désiré est bloqué pendant que tous les autres canaux sont détectés. Avec cette méthode, il est facile de saturer l'amplificateur pour une meilleure suppression de bruit tout en évitant en grande partie la dégradation causé par le post-filtrage. Nous avons expérimentalement démontré un système WDM dense de 8 x 10 Gbps avec une source incohérente et un SOA en saturation. Une autre contribution originale de ce travail est le développement d'un outil de simulation pour les SOAs qui est numériquement plus efficace et léger que les modèles connus à ce jour. Nous avons donc développé un modèle théorique simple, pouvant être implémenté par diagramme block, dans le but de simuler les performances des hens de communications WDM. Notre modèle démontre une bonne concordance avec les résultats expérimentaux ainsi qu'une diminution de temps de calcul de l'ordre de 20 fois. Finalement, lors de la dernière partie de ces travaux, nous nous sommes occupés de mesurer, de façon précise, le temps de recouvrement du gain dans un SOA. Le temps de recouvrement des porteurs dans un SOA est un des paramètres les plus importants qui sont à l'origine du phénomène de nettoyage de bruit et qui régissent le comportement ainsi que les dynamiques de l'amplificateur. Nous avons étudié en particulier, la dépendance de ce temps de recouvrement r de la longueur d'onde. Pour le SOA utilisé lors de notre étude expérimentale, nous avons démontré que r dépendait de la longueur d'onde de façon similaire au spectre de gain. Ces mesures ont été possibles grâce au développement d'un nouveau dispositif de mesure pompe/sonde, qui permettait de mesurer le recouvrement du gain pour une pompe et une sonde à la même longueur d'onde et ayant le même état de polarisation

    Wavelet-Coding for Radio over Fibre

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    Deep Space Network information system architecture study

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    The purpose of this article is to describe an architecture for the Deep Space Network (DSN) information system in the years 2000-2010 and to provide guidelines for its evolution during the 1990s. The study scope is defined to be from the front-end areas at the antennas to the end users (spacecraft teams, principal investigators, archival storage systems, and non-NASA partners). The architectural vision provides guidance for major DSN implementation efforts during the next decade. A strong motivation for the study is an expected dramatic improvement in information-systems technologies, such as the following: computer processing, automation technology (including knowledge-based systems), networking and data transport, software and hardware engineering, and human-interface technology. The proposed Ground Information System has the following major features: unified architecture from the front-end area to the end user; open-systems standards to achieve interoperability; DSN production of level 0 data; delivery of level 0 data from the Deep Space Communications Complex, if desired; dedicated telemetry processors for each receiver; security against unauthorized access and errors; and highly automated monitor and control
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