4,250 research outputs found

    Evolutionary Synthesis of Analog Electronic Circuits Using EDA Algorithms

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    Disertační práce je zaměřena na návrh analogových elektronických obvodů pomocí algoritmů s pravěpodobnostními modely (algoritmy EDA). Prezentované metody jsou na základě požadovaných charakteristik cílových obvodů schopny navrhnout jak parametry použitých komponent tak také jejich topologii zapojení. Tři různé metody využití EDA algoritmů jsou navrženy a otestovány na příkladech skutečných problémů z oblasti analogových elektronických obvodů. První metoda je určena pro návrh pasivních analogových obvodů a využívá algoritmus UMDA pro návrh jak topologie zapojení tak také hodnot parametrů použitých komponent. Metoda je použita pro návrh admitanční sítě s požadovanou vstupní impedancí pro účely chaotického oscilátoru. Druhá metoda je také určena pro návrh pasivních analogových obvodů a využívá hybridní přístup - UMDA pro návrh topologie a metodu lokální optimalizace pro návrh parametrů komponent. Třetí metoda umožňuje návrh analogových obvodů obsahujících také tranzistory. Metoda využívá hybridní přístup - EDA algoritmus pro syntézu topologie a metoda lokální optimalizace pro určení parametrů použitých komponent. Informace o topologii je v jednotlivých jedincích populace vyjádřena pomocí grafů a hypergrafů.Dissertation thesis is focused on design of analog electronic circuits using Estimation of Distribution Algorithms (EDA). Based on the desired characteristics of the target circuits the proposed methods are able to design the parameters of the used components and theirs topology of connection as well. Three different methods employing EDA algorithms are proposed and verified on examples of real problems from the area of analog circuits design. The first method is capable to design passive analog circuits. The method employs UMDA algorithm which is used for determination of the parameters of the used components and synthesis of the topology of their connection as well. The method is verified on the problem of design of admittance network with desired input impedance function which is used as a part of chaotic oscillator circuit. The second method is also capable to design passive analog circuits. The method employs hybrid approach - UMDA for synthesis of the topology and local optimization method for determination of the parameters of the components. The third method is capable to design analog circuits which include also ac- tive components such as transistors. Hybrid approach is used. The topology is synthesized using EDA algorithm and the parameters are determined using a local optimization method. In the individuals of the population information about the topology is represented using graphs and hypergraphs.

    Study on multi-objective optimization of circuit design by evolutionary computation technologies

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    制度:新 ; 報告番号:甲3364号 ; 学位の種類:博士(工学) ; 授与年月日:2011/4/25 ; 早大学位記番号:新568

    Automated design of microwave discrete tuning differential capacitance circuits in Si-integrated technologies

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    A genetic algorithm used to design radio-frequency binary-weighted differential switched capacitor arrays (RFDSCAs) is presented in this article. The algorithm provides a set of circuits all having the same maximum performance. This article also describes the design, implementation, and measurements results of a 0.25 lm BiCMOS 3-bit RFDSCA. The experimental results show that the circuit presents the expected performance up to 40 GHz. The similarity between the evolutionary solutions, circuit simulations, and measured results indicates that the genetic synthesis method is a very useful tool for designing optimum performance RFDSCAs

    Design of Passive Analog Electronic Circuits Using Hybrid Modified UMDA algorithm

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    Hybrid evolutionary passive analog circuits synthesis method based on modified Univariate Marginal Distribution Algorithm (UMDA) and a local search algorithm is proposed in the paper. The modification of the UMDA algorithm which allows to specify the maximum number of the nodes and the maximum number of the components of the synthesized circuit is proposed. The proposed hybrid approach efficiently reduces the number of the objective function evaluations. The modified UMDA algorithm is used for synthesis of the topology and the local search algorithm is used for determination of the parameters of the components of the designed circuit. As an example the proposed method is applied to a problem of synthesis of the fractional capacitor circuit

    Digital Filter Design Using Improved Artificial Bee Colony Algorithms

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    Digital filters are often used in digital signal processing applications. The design objective of a digital filter is to find the optimal set of filter coefficients, which satisfies the desired specifications of magnitude and group delay responses. Evolutionary algorithms are population-based meta-heuristic algorithms inspired by the biological behaviors of species. Compared to gradient-based optimization algorithms such as steepest descent and Newton’s like methods, these bio-inspired algorithms have the advantages of not getting stuck at local optima and being independent of the starting point in the solution space. The limitations of evolutionary algorithms include the presence of control parameters, problem specific tuning procedure, premature convergence and slower convergence rate. The artificial bee colony (ABC) algorithm is a swarm-based search meta-heuristic algorithm inspired by the foraging behaviors of honey bee colonies, with the benefit of a relatively fewer control parameters. In its original form, the ABC algorithm has certain limitations such as low convergence rate, and insufficient balance between exploration and exploitation in the search equations. In this dissertation, an ABC-AMR algorithm is proposed by incorporating an adaptive modification rate (AMR) into the original ABC algorithm to increase convergence rate by adjusting the balance between exploration and exploitation in the search equations through an adaptive determination of the number of parameters to be updated in every iteration. A constrained ABC-AMR algorithm is also developed for solving constrained optimization problems.There are many real-world problems requiring simultaneous optimizations of more than one conflicting objectives. Multiobjective (MO) optimization produces a set of feasible solutions called the Pareto front instead of a single optimum solution. For multiobjective optimization, if a decision maker’s preferences can be incorporated during the optimization process, the search process can be confined to the region of interest instead of searching the entire region. In this dissertation, two algorithms are developed for such incorporation. The first one is a reference-point-based MOABC algorithm in which a decision maker’s preferences are included in the optimization process as the reference point. The second one is a physical-programming-based MOABC algorithm in which physical programming is used for setting the region of interest of a decision maker. In this dissertation, the four developed algorithms are applied to solve digital filter design problems. The ABC-AMR algorithm is used to design Types 3 and 4 linear phase FIR differentiators, and the results are compared to those obtained by the original ABC algorithm, three improved ABC algorithms, and the Parks-McClellan algorithm. The constrained ABC-AMR algorithm is applied to the design of sparse Type 1 linear phase FIR filters of filter orders 60, 70 and 80, and the results are compared to three state-of-the-art design methods. The reference-point-based multiobjective ABC algorithm is used to design of asymmetric lowpass, highpass, bandpass and bandstop FIR filters, and the results are compared to those obtained by the preference-based multiobjective differential evolution algorithm. The physical-programming-based multiobjective ABC algorithm is used to design IIR lowpass, highpass and bandpass filters, and the results are compared to three state-of-the-art design methods. Based on the obtained design results, the four design algorithms are shown to be competitive as compared to the state-of-the-art design methods

    An extrinsic function-level evolvable hardware approach

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    The function level evolvable hardware approach to synthesize the combinational multiple-valued and binary logic functions is proposed in first time. The new representation of logic gate in extrinsic EHW allows us to describe behaviour of any multi-input multi-output logic function. The circuit is represented in the form of connections and functionalities of a rectangular array of building blocks. Each building block can implement primitive logic function or any multi-input multi-output logic function defined in advance. The method has been tested on evolving logic circuits using half adder, full adder and multiplier. The effectiveness of this approach is investigated for multiple-valued and binary arithmetical functions. For these functions either method appears to be much more efficient than similar approach with two-input one-output cell representation

    Evolutionary morphogenesis for multi-cellular systems

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    With a gene required for each phenotypic trait, direct genetic encodings may show poor scalability to increasing phenotype length. Developmental systems may alleviate this problem by providing more efficient indirect genotype to phenotype mappings. A novel classification of multi-cellular developmental systems in evolvable hardware is introduced. It shows a category of developmental systems that up to now has rarely been explored. We argue that this category is where most of the benefits of developmental systems lie (e.g. speed, scalability, robustness, inter-cellular and environmental interactions that allow fault-tolerance or adaptivity). This article describes a very simple genetic encoding and developmental system designed for multi-cellular circuits that belongs to this category. We refer to it as the morphogenetic system. The morphogenetic system is inspired by gene expression and cellular differentiation. It focuses on low computational requirements which allows fast execution and a compact hardware implementation. The morphogenetic system shows better scalability compared to a direct genetic encoding in the evolution of structures of differentiated cells, and its dynamics provides fault-tolerance up to high fault rates. It outperforms a direct genetic encoding when evolving spiking neural networks for pattern recognition and robot navigation. The results obtained with the morphogenetic system indicate that this "minimalist” approach to developmental systems merits further stud

    A Comprehensive Review of Bio-Inspired Optimization Algorithms Including Applications in Microelectronics and Nanophotonics

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    The application of artificial intelligence in everyday life is becoming all-pervasive and unavoidable. Within that vast field, a special place belongs to biomimetic/bio-inspired algorithms for multiparameter optimization, which find their use in a large number of areas. Novel methods and advances are being published at an accelerated pace. Because of that, in spite of the fact that there are a lot of surveys and reviews in the field, they quickly become dated. Thus, it is of importance to keep pace with the current developments. In this review, we first consider a possible classification of bio-inspired multiparameter optimization methods because papers dedicated to that area are relatively scarce and often contradictory. We proceed by describing in some detail some more prominent approaches, as well as those most recently published. Finally, we consider the use of biomimetic algorithms in two related wide fields, namely microelectronics (including circuit design optimization) and nanophotonics (including inverse design of structures such as photonic crystals, nanoplasmonic configurations and metamaterials). We attempted to keep this broad survey self-contained so it can be of use not only to scholars in the related fields, but also to all those interested in the latest developments in this attractive area

    Evolvable hardware platform for fault-tolerant reconfigurable sensor electronics

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