39,243 research outputs found
Open-ended evolution to discover analogue circuits for beyond conventional applications
This is the author's accepted manuscript. The final publication is available at Springer via http://dx.doi.org/10.1007/s10710-012-9163-8. Copyright @ Springer 2012.Analogue circuits synthesised by means of open-ended evolutionary algorithms often have unconventional designs. However, these circuits are typically highly compact, and the general nature of the evolutionary search methodology allows such designs to be used in many applications. Previous work on the evolutionary design of analogue circuits has focused on circuits that lie well within analogue application domain. In contrast, our paper considers the evolution of analogue circuits that are usually synthesised in digital logic. We have developed four computational circuits, two voltage distributor circuits and a time interval metre circuit. The approach, despite its simplicity, succeeds over the design tasks owing to the employment of substructure reuse and incremental evolution. Our findings expand the range of applications that are considered suitable for evolutionary electronics
Development of the Telemetrical Intraoperative Soft Tissue Tension Monitoring System in Total Knee Replacement with MEMS and ASIC Technologies
The alignment of the femoral and tibial components of the Total Knee Arthoplasty (TKA) is one of the most important factors to implant survivorship. Hence, numerous ligament balancing techniques and devices have been developed in order to accurately balance the knee intra-operatively. Spacer block, tensioner and tram adapter are instruments that allow surgeons to qualitatively balance the flexion and extension gaps during TKA. However, even with these instruments, the surgical procedure still relies on the skill and experience of the surgeon. The objective of this thesis is to develop a computerized surgical instrument that can acquire intra-operative data telemetrically for surgeons and engineers. Microcantilever is chosen to be used as the strain sensing elements. Even though many high end off-the-shelf data acquisition components and integrated circuit (IC) chips exist on the market, yet multiple components are required to process the entire array of microcantilevers and achieve the desired functions. Due to the size limitation of the off-chip components, an Application Specific Integrated Circuit (ASIC) chip is designed and fabricated. Using a spacer block as a base, sensors, a data acquisition system as well as the transmitter and antenna are embedded into it. The electronics are sealed with medical grade epoxy
From FPGA to ASIC: A RISC-V processor experience
This work document a correct design flow using these tools in the Lagarto RISC- V Processor and the RTL design considerations that must be taken into account, to move from a design for FPGA to design for ASIC
The ARIEL Instrument Control Unit design for the M4 Mission Selection Review of the ESA's Cosmic Vision Program
The Atmospheric Remote-sensing Infrared Exoplanet Large-survey mission
(ARIEL) is one of the three present candidates for the ESA M4 (the fourth
medium mission) launch opportunity. The proposed Payload will perform a large
unbiased spectroscopic survey from space concerning the nature of exoplanets
atmospheres and their interiors to determine the key factors affecting the
formation and evolution of planetary systems. ARIEL will observe a large number
(>500) of warm and hot transiting gas giants, Neptunes and super-Earths around
a wide range of host star types, targeting planets hotter than 600 K to take
advantage of their well-mixed atmospheres. It will exploit primary and
secondary transits spectroscopy in the 1.2-8 um spectral range and broad-band
photometry in the optical and Near IR (NIR). The main instrument of the ARIEL
Payload is the IR Spectrometer (AIRS) providing low-resolution spectroscopy in
two IR channels: Channel 0 (CH0) for the 1.95-3.90 um band and Channel 1 (CH1)
for the 3.90-7.80 um range. It is located at the intermediate focal plane of
the telescope and common optical system and it hosts two IR sensors and two
cold front-end electronics (CFEE) for detectors readout, a well defined process
calibrated for the selected target brightness and driven by the Payload's
Instrument Control Unit (ICU).Comment: Experimental Astronomy, Special Issue on ARIEL, (2017
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Noise shaping Asynchronous SAR ADC based time to digital converter
Time-to-digital converters (TDCs) are key elements for the digitization of timing information in modern mixed-signal circuits such as digital PLLs, DLLs, ADCs, and on-chip jitter-monitoring circuits. Especially, high-resolution TDCs are increasingly employed in on-chip timing tests, such as jitter and clock skew measurements, as advanced fabrication technologies allow fine on-chip time resolutions. Its main purpose is to quantize the time interval of a pulse signal or the time interval between the rising edges of two clock signals. Similarly to ADCs, the performance of TDCs are also primarily characterized by Resolution, Sampling Rate, FOM, SNDR, Dynamic Range and DNL/INL. This work proposes and demonstrates 2nd order noise shaping Asynchronous SAR ADC based TDC architecture with highest resolution of 0.25 ps among current state of art designs with respect to post-layout simulation results. This circuit is a combination of low power/High Resolution 2nd Order Noise Shaped Asynchronous SAR ADC backend with simple Time to Amplitude converter (TAC) front-end and is implemented in 40nm CMOS technology. Additionally, special emphasis is given on the discussion on various current state of art TDC architectures.Electrical and Computer Engineerin
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