751 research outputs found

    Smart Chips for Smart Surroundings -- 4S

    Get PDF
    The overall mission of the 4S project (Smart Chips for Smart Surroundings) was to define and develop efficient flexible, reconfigurable core building blocks, including the supporting tools, for future Ambient System Devices. Reconfigurability offers the needed flexibility and adaptability, it provides the efficiency needed for these systems, it enables systems that can adapt to rapidly changing environmental conditions, it enables communication over heterogeneous wireless networks, and it reduces risks: reconfigurable systems can adapt to standards that may vary from place to place or standards that have changed during and after product development. In 4S we focused on heterogeneous building blocks such as analogue, hardwired functions, fine and coarse grain reconfigurable tiles and microprocessors. Such a platform can adapt to a wide application space without the need for specialized ASICs. A novel power aware design flow and runtime system was developed. The runtime system decides dynamically about the near-optimal application mapping to the given hardware platform. The overall concept was verified on hardware platforms based on an existing SoC and in a second step with novel silicon. DRM (Digital Radio Mondiale) and MPEG4 Video applications have been implemented on the platforms demonstrating the adaptability of the 4S concept

    Run-time mapping of applications to a heterogeneous reconfigurable tiled system on chip architecture

    Get PDF
    This work evaluates an algorithm that maps a number of communicating processes to a heterogeneous tiled system on chip (SoC) architecture at run-time. The mapping algorithm minimizes the total amount of energy consumption, while still providing an adequate quality of service (QoS). A realistic example is mapped using this algorithm

    Can the Digital Surpass the Analog: DAB+ Possibilities, Limitations and User Expectations

    Get PDF
    Radio is by far the most accessible medium. With its mobility and availability, it attracts listeners by its simplicity and friendliness. The present information situation is characterized by the convergence of computers, mobile devices, telecommunication and broadcasting technologies and the divergence of different ways of delivering and storing media. Consumers are overwhelmed by new electronic gadgets appearing every year. They are astonished by new technical innovations that are being designed to ease their life and change their habits. Even the broadcasting sector itself is facing significant changes, especially a growing competition between the private and public sector. This article reviews the current status of analog and digital broadcasting technologies. It analyzes a case study of user expectations related with today’s digital media, particularly radio transmission. We discuss the principal possibilities, limitations and user expectations related with digital audio broadcasting, as well as the economic, technological, regulatory and frequency management factors

    On the efficiency of PAPR reduction schemes deployed for DRM systems

    Get PDF
    Digital Radio Mondiale (DRM) is the universally, openly standardized digital broadcasting system for all frequencies including LW, MW, and SW as well as VHF bands. Alongside providing high audio quality to listeners, DRM satisfies technological requirements posed by broadcasters, manufacturers and regulatory authorities and thus bears a great potential for the future of global radio. One of the key issues here concerns green broadcasting. Facing the need for high-power transmitters to cover wide areas, there is room for improvement concerning the power efficiency of DRM-transmitters. A major drawback of DRM is its high peak-to-average power ratio (PAPR) due to the applied transmission technology based on Orthogonal Frequency Division Multiplexing (OFDM), which results in non-linearities in the emitted signal, low power efficiency, and high costs of transmitters. To overcome this, numerous schemes have been investigated for reducing PAPR in OFDM systems. In this paper, we review and analyze various technologies to reduce PAPR providing that the technical feasibility and DRM-specific system architecture and edge conditions regarding the system performance in terms of modulation error rate, compliance with frequency mask, and synchronization efficiency are ensured. All evaluations are carried out with I/Q signals which are monitored in real operation to present the actual performance of proposed PAPR techniques. Subsequently, the capability of the best approach is evaluated via measurements on a DRM test platform, where achieved transmit power gain of 10 dB is shown. According to our evaluation results, PAPR reduction schemes based on active constellation extension followed by a filter prove to be promising towards practical realization of power-efficient transmitters. © 2016, The Author(s)

    DRM analysis using a simulator of multiprocessor embedded system

    Get PDF
    Mestrado em Engenharia Electrónica e TelecomunicaçõesOs sistemas multiprocessador são uma tecnologia emergente. O projecto Hijdra, que está a ser desenvolvido na “NXP semiconductors Research” é um sistema multiprocessador de tempo real que corre aplicações com constrangimentos do tipo “hard” e “soft”. Nestes sistemas, os processadores comunicam através de uma rede de silício. As aplicações que correm no sistema multiprocessador consistem em múltiplas tarefas que correm em processadores embutidos. Achar soluções para o mapeamento das tarefas é o maior problema destes sistemas. Uma aplicação para este sistema que tem vindo a ser estudada é o “Car Radio”. Esta dissertação diz respeito a uma aplicação de rádio digital (DRM) na arquitectura Hijdra. Neste contexto, uma aplicação de um receptor de DRM foi estudada. Um modelo de análise de “Data Flow” foi extraído a partir da aplicação, foi estudada a latência introduzida na rede de silício pela introdução de um novo processador (acelerador de Viterbi) e foi estudada a possibilidade do mapeamento das várias tarefas da aplicação em diferentes processadores a correr em paralelo. Muitas estratégias ainda ficaram por definir a fim de optimizar o desempenho da aplicação do receptor de DRM de modo a esta poder trabalhar de uma forma mais eficaz. ABSTRACT: Multiprocessor systems are an emerging technology. The Hijdra project being developed at NXP semiconductors Research is a multiprocessor system running with both hard and soft real time streaming media jobs. These jobs consist of multiple tasks running on embedded multiprocessors. Finding good solutions for job mapping is the main problem of these systems. One application which has being studied for Hijdra is the “Car Radio”. This thesis concerns the study of a digital radio receptor application (DRM) in Hijdra architecture. In this context, a data flow model of analysis was extracted from the application, the latency introduced by the addition of a new tile (Viterbi accelerator) and eventual speed gains were studied and the possibility of mapping the different tasks of the application in different processors was foreseen. Many strategies were yet to be defined in order to optimize the application performance so it can work more effectively in the multiprocessor system

    An evaluation of low cost fpga-based software defined radios for education and research

    Get PDF
    The purpose of this study is to evaluate a low-cost Software Defined Radio (SDR) platform for educational and research purposes. An evaluation of existing SDR platforms and design techniques was performed, identifying low cost hardware and software suitable for a laboratory environment. The idea behind the project is to provide undergraduate students with a generic hardware platform so that they can perform simple radio communication experiments. This paper compares and evaluates the existing research projects and educational lab experiments done for SDR. Basic AM and FM radios are created and simulated on the hardware. The detailed procedure to create a design and download the design onto the hardware has been documented, and tutorials are created for step-by-step procedures to perform the experiments. With their ease of use and low cost, Spartan3E FPGA board and Simulink are the best choices for conducting low frequency radio communication experiments
    corecore