Strengthening measurements from the edges: application-level packet loss rate estimation

Network users know much less than ISPs, Internet exchanges and content providers about what happens inside the network. Consequently users cannot either easily detect network neutrality violations or readily exercise their market power by knowledgeably switching ISPs. This paper contributes to the ongoing efforts to empower users by proposing two models to estimate -- via application-level measurements -- a key network indicator, i.e., the packet loss rate (PLR) experienced by FTP-like TCP downloads. Controlled, testbed, and large-scale experiments show that the Inverse Mathis model is simpler and more consistent across the whole PLR range, but less accurate than the more advanced Likely Rexmit model for landline connections and moderate PL

High Speed Networking In The Multi-Core Era

High speed networking is a demanding task that has traditionally been performed in dedicated, purpose built hardware or specialized network processors. These platforms sacrifice flexibility or programmability in favor of performance. Recently, there has been much interest in using multi-core general purpose processors for this task, which have the advantage of being easily programmable and upgradeable. The best way to exploit these new architectures for networking is an open question that has been the subject of much recent research. In this dissertation, I explore the best way to exploit multi-core general purpose processors for packet processing applications. This includes both new architectural organizations for the processors as well as changes to the systems software. I intend to demonstrate the efficacy of these techniques by using them to build an open and extensible network security and monitoring platform that can out perform existing solutions

Multi-agent system for consumer-oriented electronic commerce

This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel University.With the advent of the information superhighway and the exponential growth of the Internet usage, the importance of multi-agent systems is proliferating. The central theme of this thesis is to demonstrate the benefits of adopting multi-agent system (MAS) paradigm to implement consumer oriented electronic commerce system. The discipline of computational science is exploited to provide insights into the behaviour of a model of consumer behaviour that reflect the cognitive notion that the thesis has developed. For this, a multi-agent system computational environment is used to model and investigate the consumer purchase over the Internet. The MAS is developed based on a presented taxonomy, that is most relevant to the thesis application. The thesis also presents a novel approach to negotiation. Results of empirical evaluations provide a strong support that agents using the proposed approach would achieve higher payoff than human subjects. An empirical evaluation for the usability of the prototype system is also presented. Reported results are very encouraging to implement a fieldable system. To complement the perspective for a complete consumer-oriented EC system, the thesis addresses and develops approaches for searching and extracting relevant information. Example experiments are also reported to act as indicators for the effectiveness of the developed approaches

Branch Prediction For Network Processors

Originally designed to favour flexibility over packet processing performance, the future of the programmable network processor is challenged by the need to meet both increasing line rate as well as providing additional processing capabilities. To meet these requirements, trends within networking research has tended to focus on techniques such as offloading computation intensive tasks to dedicated hardware logic or through increased parallelism. While parallelism retains flexibility, challenges such as load-balancing limit its scope. On the other hand, hardware offloading allows complex algorithms to be implemented at high speed but sacrifice flexibility. To this end, the work in this thesis is focused on a more fundamental aspect of a network processor, the data-plane processing engine. Performing both system modelling and analysis of packet processing functions; the goal of this thesis is to identify and extract salient information regarding the performance of multi-processor workloads. Following on from a traditional software based analysis of programme workloads, we develop a method of modelling and analysing hardware accelerators when applied to network processors. Using this quantitative information, this thesis proposes an architecture which allows deeply pipelined micro-architectures to be implemented on the data-plane while reducing the branch penalty associated with these architectures