Intelligent approaches to VLSI routing

Very Large Scale Integrated-circuit (VLSI) routing involves many large-size and complex problems and most of them have been shown to be NP-hard or NP-complete. As a result, conventional approaches, which have been successfully used to handle relatively small-size routing problems, are not suitable to be used in tackling large-size routing problems because they lead to \u27combinatorial explosion\u27 in search space. Hence, there is a need for exploring more efficient routing approaches to be incorporated into today\u27s VLSI routing system. This thesis strives to use intelligent approaches, including symbolic intelligence and computational intelligence, to solve three VLSI routing problems: Three-Dimensional (3-D) Shortest Path Connection, Switchbox Routing and Constrained Via Minimization. The 3-D shortest path connection is a fundamental problem in VLSI routing. It aims to connect two terminals of a net that are distributed in a 3-D routing space subject to technological constraints and performance requirements. Aiming at increasing computation speed and decreasing storage space requirements, we present a new A* algorithm for the 3-D shortest path connection problem in this thesis. This new A*algorithm uses an economical representation and adopts a novel back- trace technique. It is shown that this algorithm can guarantee to find a path if one exists and the path found is the shortest one. In addition, its computation speed is fast, especially when routed nets are spare. The computational complexities of this A* algorithm at the best case and the worst case are O(Ɩ) and 0(Ɩ3), respectively, where Ɩ is the shortest path length between the two terminals. Most importantly, this A\u27 algorithm is superior to other shortest path connection algorithms as it is economical in terms of storage space requirement, i.e., 1 bit/grid. The switchbox routing problem aims to connect terminals at regular intervals on the four sides of a rectangle routing region. From a computational point of view, the problem is NP-hard. Furthermore, it is extremely complicated and as the consequence no existing algorithm can guarantee to find a solution even if one exists no matter how high the complexity of the algorithm is. Previous approaches to the switch box routing problem can be divided into algorithmic approaches and knowledge-based approaches. The algorithmic approaches are efficient in computational time, but they are unsucessful at achieving high routing completion rate, especially for some dense and complicated switchbox routing problems. On the other hand, the knowledge-based approaches can achieve high routing completion rate, but they are not efficient in computation speed. In this thesis we present a hybrid approach to the switchbox routing problem. This hybrid approach is based on a new knowledge-based routing technique, namely synchronized routing, and combines some efficient algorithmic routing techniques. Experimental results show it can achieve the high routing completion rate of the knowledge-based approaches and the high efficiency of the algorithmic approaches. The constrained via minimization is an important optimization problem in VLSI routing. Its objective is to minimize the number of vias introduced in VLSI routing. From computational perspective, the constrained via minimization is NP-complete. Although for a special case where the number of wire segments splits at a via candidate is not more than three, elegant theoretical results have been obtained. For a general case in which there exist more than three wire segment splits at a via candidate few approaches have been proposed, and those approaches are only suitable for tackling some particular routing styles and are difficult or impossible to adjust to meet practical requirements. In this thesis we propose a new graph-theoretic model, namely switching graph model, for the constrained via minimization problem. The switching graph model can represent both grid-based and grid less routing problems, and allows arbitrary wire segments split at a via candidate. Then on the basis of the model, we present the first genetic algorithm for the constrained via minimization problem. This genetic algorithm can tackle various kinds of routing styles and be configured to meet practical constraints. Experimental results show that the genetic algorithm can find the optimal solutions for most cases in reasonable time

Um modelo de otimização para o problema de sequenciamento com setups dependentes e assimétricos na indústria de achocolatados

TCC(graduação) - Universidade Federal de Santa Catarina. Centro Tecnológico. Engenharia de ProduçãoOs problemas de Planejamento de produção têm sido amplamente estudados na literatura tanto por suas múltiplas aplicações quanto para adaptá-los ao desenvolvimento de novas tecnologias. As técnicas de otimização do sequenciamento da produção despertam grande interesse nas empresas, uma vez que buscam de forma permanente atingir altos níveis de produtividade para competir de forma vantajosa nos mercados doméstico e internacional. O presente trabalho tem como objetivo propor e implementar um modelo de otimização que defina planos de sequenciamento de produção de uma indústria de achocolatados. Para isso, são consideradas características do ambiente job shop e tempos de setup assimétricos e dependentes da sequência. Este tipo de problema é de difícil tratamento computacional em virtude da alta complexidade combinatória inerente ao problema. O modelo proposto está baseado em programação matemática e tem como propósito a minimização do tempo total de setup. O sequenciamento da produção obtido por meio do modelo proposto apresentou uma redução de 24% do total médio de setup observado na empresa objeto de estudo.Production planning problems have widely studied in the literature both for their multiple applications and to adapt them to the development of new technologies. Production sequencing optimization techniques arouse great interest in companies, as they permanently seek to achieve high levels of production efficiency to compete advantageously on both domestic and international markets. The present work aims to propose and implement an optimization model that defines production sequencing plans for a chocolate milk industry. For this, characteristics of the job shop environment and asymmetric and sequence-dependent setup times are considered. This type of problem is difficult to deal with computationally due to the high combinatorial complexity inherent to the problem. The proposed model is based on mathematical programming and its purpose is to minimize the total setup time. The production sequencing obtained through the proposed model showed a reduction of 24% of the average total setup observed in the company object of study