Development of a Rapid Fatigue Life Testing Method for Reliability Assessment of Flip-Chip Solder Interconnects

The underlying physics of failure are critical in assessing the long term reliability of power packages in their intended field applications, yet traditional reliability determination methods are largely inadequate when considering thermomechanical failures. With current reliability determination methods, long test durations, high costs, and a conglomerate of concurrent reliability degrading threat factors make effective understanding of device reliability difficult and expensive. In this work, an alternative reliability testing apparatus and associated protocol was developed to address these concerns; targeting rapid testing times with minimal cost while preserving fatigue life prediction accuracy. Two test stands were fabricated to evaluate device reliability at high frequency (60 cycles/minute) with the first being a single-directional unit capable of exerting large forces (up to 20 N) on solder interconnects in one direction. The second test stand was developed to allow for bi-directional application of stress and the integration of an oven to enable testing at elevated steady-state temperatures. Given the high frequency of testing, elevated temperatures are used to emulate the effects of creep on solder fatigue lifetime. Utilizing the mechanical force of springs to apply shear loads to solder interconnects within the devices, the reliability of a given device to withstand repeated cycling was studied using resistance monitoring techniques to detect the number of cycles-to-failure (CTF). Resistance monitoring was performed using specially designed and fabricated, device analogous test vehicles assembled with the ability to monitor circuit resistance in situ. When a resistance rise of 30 % was recorded, the device was said to have failed. A mathematical method for quantifying the plastic work density (amount of damage) sustained by the solder interconnects prior to failure was developed relying on the relationship between Hooke’s Law for springs and damage deflection to accurately assess the mechanical strength of tested devices

COMPARISON OF INTERCONNECT FAILURES OF ELECTRONIC COMPONENTS MOUNTED ON FR-4 BOARDS WITH SN37PB AND SN3.0AG0.5CU SOLDERS UNDER RAPID LOADING CONDITIONS.

Electronic circuit boards can experience rapid loading through shock or vibration events during their lives; these events can happen in transportation, manufacture, or in field conditions. Due to the lead-free migration, it is necessary to evaluate how this rapid loading affects the durability of a leading lead free solder alternative (Sn3.0Ag0.5Cu) assemblies as compared with traditional eutectic lead based solder Sn37Pb assemblies. A literature review showed that there is little agreement on the fatigue behavior of Sn37Pb solder assemblies and Sn3.0Ag0.5Cu solder assemblies subjected to rapid loading. To evaluate the failure behavior of Sn37Pb and Sn3.0Ag0.5Cu solder assemblies under rapid loading conditions, leadless chip resistors (LCR), ball grid arrays (BGA), small outline integrated circuits (SOIC), and small outline transistors (SOT) were subjected to four point bend tests via a servo-hydraulic testing machine at printed wiring board (PWB) strain rates greater than 0.1/s. The PWB strain was the metric used to evaluate the failures. The PBGAs and LCRs were examined with both Sn37Pb and Sn3.0Ag0.5Cu solders. There was no significant difference found in the resulting test data for the behavior of the two solder assembly types in the high cycle fatigue regime. PBGA assemblies with both solders were also evaluated at a higher strain rate, approximately 1/s, using drop testing. There was no discernable difference found between the assemblies as well as no difference in the failure rate of the PBGAs at this higher strain rate. The PWB strain was converted to an equivalent solder stress index using finite element analysis. This equivalent stress index value was used to compare the results from the LCR and BGA testing for Sn37Pb and Sn3.0Ag0.5Cu. Independently generated BGA data that differed with respect to many testing variables was adjusted and incorporated to this comparison. The resulting plot did not show any significant differences between the behaviors of the two solder assemblies under rapid loading outside of the ultra low cycle fatigue regime, where the assemblies with Sn37Pb solder outperformed the assemblies with SnAgCu solder

MODELING RATE DEPENDENT DURABILITY OF LOW-Ag SAC INTERCONNECTS FOR AREA ARRAY PACKAGES UNDER TORSION LOADS

The thesis discusses modeling rate-dependent durability of solder interconnects under mechanical torsion loading for surface mount area array components. The study discusses an approach to incorporate strain-rate dependency in durability estimation for solder interconnects. The components under study are two configurations of BGAs (ball grid array) assembled with select lead-free solders. A torsion test setup is used to apply displacement controlled loads on the test board. Accelerated test load profile is experimentally determined. Torsion test is carried out for all the components under investigation to failure. Strain-rate dependent (Johnson-Cook model) and strain-rate independent, elastic-plastic properties are used to model the solders in finite element simulation. Damage model from literature is used to estimate the durability for SAC305 solder to validate the approach. Test data is used to extract damage model constants for SAC105 solder and extract mechanical fatigue durability curve

Detection of Interconnect Failure Precursors using RF Impedance Analysis

Many failures in electronics result from the loss of electrical continuity of common board-level interconnects such as solder joints. Measurement methods based on DC resistance such as event detectors and data-loggers have long been used by the electronics industry to monitor the reliability of interconnects during reliability testing. DC resistance is well-suited for characterizing electrical continuity, such as identifying an open circuit, but it is not useful for detecting a partially degraded interconnect. Degradation of interconnects, such as cracking of solder joints due to fatigue or shock loading, usually initiates at an exterior surface and propagates towards the interior. A partially degraded interconnect can cause the RF impedance to increase due to the skin effect, a phenomenon wherein signal propagation at frequencies above several hundred MHz is concentrated at the surface of a conductor. Therefore, RF impedance exhibits greater sensitivity compared to DC resistance in detecting early stages of interconnect degradation and provides a means to prevent and predict an important cause of electronics failures. This research identifies the applicability of RF impedance as a means of a failure precursor that allows for prognostics on interconnect degradation based on electrical measurement. It also compares the ability of RF impedance with that of DC resistance to detect early stages of interconnect degradation, and to predict the remaining life of an interconnect. To this end, RF impedance and DC resistance of a test circuit were simultaneously monitored during interconnect stress testing. The test vehicle included an impedance-controlled circuit board on which a surface mount component was soldered using two solder joints at the end terminations. During stress testing, the RF impedance exhibited a gradual non-linear increase in response to the early stages of solder joint cracking while the DC resistance remained constant. The gradual increase in RF impedance was trended using prognostic algorithms in order to predict the time to failure of solder joints. This prognostic approach successfully predicted solder joint remaining life with a prediction error of less than 3%. Furthermore, it was demonstrated both theoretically and experimentally that the RF impedance analysis was able to distinguish between two competing interconnect failure mechanisms: solder joint cracking and pad cratering. These results indicate that RF impedance provides reliable interconnect failure precursors that can be used to predict interconnect failures. Since the performance of high speed devices is adversely affected by early stages of interconnect degradation, RF impedance analysis has the potential to provide improved reliability assessment for these devices, as well as accurate failure prediction for current and future electronics

End-of-Life and Constant Rate Reliability Modeling for Semiconductor Packages Using Knowledge-Based Test Approaches

End-of-life and constant rate reliability modeling for semiconductor packages are the focuses of this dissertation. Knowledge-based testing approaches are applied and the test-to-failure approach is approved to be a reliable approach. First of all, the end-of-life AF models for solder joint reliability are studied. The research results show using one universal AF model for all packages is flawed approach. An assessment matrix is generated to guide the application of AF models. The AF models chosen should be either assessed based on available data or validated through accelerated stress tests. A common model can be applied if the packages have similar structures and materials. The studies show that different AF models will be required for SnPb solder joints and SAC lead-free solder joints. Second, solder bumps under power cycling conditions are found to follow constant rate reliability models due to variations of the operating conditions. Case studies demonstrate that a constant rate reliability model is appropriate to describe non solder joint related semiconductor package failures as well. Third, the dissertation describes the rate models using Chi-square approach cannot correlate well with the expected failure mechanisms in field applications. The estimation of the upper bound using a Chi-square value from zero failure is flawed. The dissertation emphasizes that the failure data is required for the failure rate estimation. A simple but tighter approach is proposed and provides much tighter bounds in comparison of other approaches available. Last, the reliability of solder bumps in flip chip packages under power cycling conditions is studied. The bump materials and underfill materials will significantly influence the reliability of the solder bumps. A set of comparable bump materials and the underfill materials will dramatically improve the end-of-life solder bumps under power cycling loads, and bump materials are one of the most significant factors. Comparing to the field failure data obtained, the end-of-life model does not predict the failures in the field, which is more close to an approximately constant failure rate. In addition, the studies find an improper underfill material could change the failure location from solder bump cracking to ILD cracking or BGA solder joint failures

Characterising Solder Materials from Random Vibration Response of their Interconnects in BGA Packaging

Solder interconnection in electronic packaging is the weakest link, thus driving the reliability of electronic modules and systems. Improving interconnection integrity in safety-critical applications is vital in enhancing application reliability. This investigation qualifies the random vibration response of five essential solder compositions in ball grid array (BGA) solder joints used in safety-critical applications. The solder compositions are eutectic Sn63Pb37 and SnAgCu (SAC) 305, 387, 396, and 405. Computer-aided engineering (CAE) employing ANSYS FEA and SolidWorks software is implemented in this investigation. The solder Sn63Pb37 deformed least at 0.43 µm, followed by SAC396 at 0.58 µm, while SAC405 deformed highest at 0.88 µm. Further analysis demonstrates that possession of higher elastic modulus and mass density culminates in lower solder joint deformation. Stress is concentrated at the periphery of the solder joints in contact with the printed circuit board (PCB). The SAC396 solder accumulates the lowest stress of 14.1 MPa, followed by SAC405 at 17.9 MPa, while eutectic Sn63Pb37 accrues the highest at 34.6 MPa. Similarly, strain concentration is found at the interface between the solder joint and copper pad on PCB. SAC405 acquires the lowest elastic strain magnitude of 0.0011 mm/mm, while SAC305 records the highest strain of 0.002 mm/mm. These results demonstrate that SAC405 solder has maximum and SAC387 solder has minimum fatigue lives

HARMONIC AND RANDOM VIBRATION DURABILITY INVESTIGATION FOR SAC305 (Sn3.0Ag0.5Cu) SOLDER JOINT

ABSTRACT Title of Dissertation: HARMONIC AND RANDOM VIBRATION DURABILITY INVESTIGATION FOR SAC305 (Sn3.0Ag0.5Cu) SOLDER INTERCONNECTS Yuxun Zhou, Doctor of Philosophy, 2008 Dissertation directed by: Professor Abhijit Dasgupta Department of Mechanical Engineering Vibration loading is commonly encountered during the service life of electronic products. However, compared to thermal cycling durability, vibration durability is more complex and has been less investigated. In surface mount technology, solder joints are the primary mechanical, thermal and electrical interconnects between the component and the PWB. So the reliability of solder joints is very crucial for most electronic assemblies. The vibration durability of Pb-free solder joints is the focus of this dissertation. The characteristics of the stress from vibration loading are low amplitude and high frequency, while those from cyclic thermal loading are high amplitude and low frequency. In this study, several exploratory vibration tests were conducted, using both narrow band and broad-band, step-stress excitation at several different isothermal and thermal cycling conditions. The effect of thermal pre-aging on solder joint vibration failures was also investigated. Some of the vibration durability results were analyzed in detail, to obtain quantitative insights into the vibration fatigue behavior of the SAC305 solder material. A time-domain approach was adopted to investigate the durability of solder interconnects under different kinds of vibration and quasi-static mechanical loading. First, the solder interconnects were subjected to narrow-band (harmonic) vibration loading. The test were conducted at the first natural frequency of the test board using constant-amplitude excitation and solder fatigue properties were extracted with the help of a time-domain analysis that is based on quasi-static finite element simulation. Compared to broad-band step-stress vibration durability tests, the advantage of the harmonic constant-amplitude test is less complexity in the model extraction process, hence, less uncertainty in the desired fatigue constants. Generalized strain-based S-N curves have been obtained for both SAC305 and Sn37Pb solder materials. The strain-life model constants show that SAC305 solder material has superior fatigue properties compared to Sn37Pb solder material under low-cycle fatigue loading, while the reverse is true for high-cycle fatigue loading. These results are consistent with test results from other researchers. In actual application, SAC305 assemblies almost always fail before Sn37Pb assemblies under comparable vibration excitation because of (i) higher solder strain at a given excitation level; and (ii) multiple failure modes such as copper trace cracking. Next, durability was investigated under step-stress, broad-band (random) excitation. These test results show that SAC305 interconnects are less durable than Sn37Pb interconnects under the random excitation used in this study, which agrees with the harmonic durability results. The random and harmonic durability results were quantitatively compared with each other in this study. Finite element simulation was used to investigate the stress-strain response in the interconnects. The output of this simulation is the strain transfer function due to the first flexural mode of the PWB. This transfer function is used to obtain the solder strain from the measured board strain. This fatigue assessment method demonstrated that the model constants obtained from the harmonic test overestimate the fatigue life under random excitation by an order of magnitude. The causes for this discrepancy were systematically explored in this study. The effects of cyclic loading and mean stress on the vibration durability were addressed and found to be minimal in this study. The stress-strain curves assumed for the solder material were found to have a very large effect on the durability constants, thus affecting the agreement between harmonic and random durability results. The transient response of the components on the test board under both harmonic and random excitation was also included in the strain transfer function with the help of dynamic implicit simulation, and found to have a much stronger effect on the vibration durability at the high frequencies used in broad-band excitation compared to the low frequency used in narrow-band test. Furthermore, the higher PWB vibration modes may play a strong role and may need to be included in the strain transfer-function. This study clearly reveals that the solder strain analysis for broad-band random excitation cannot be limited to the quasi-static strain transfer-function based on the first PWB flexural mode, that has been used in some earlier studies in the literature. The time-domain approach used in this study provided fundamental and comprehensive insights into the key factors that affect vibration durability under different types of excitation, thus leading to a generalized S-N modeling approach that works for both harmonic and random vibration loading

Enabling More than Moore: Accelerated Reliability Testing and Risk Analysis for Advanced Electronics Packaging

For five decades, the semiconductor industry has distinguished itself by the rapid pace of improvement in miniaturization of electronics products-Moore's Law. Now, scaling hits a brick wall, a paradigm shift. The industry roadmaps recognized the scaling limitation and project that packaging technologies will meet further miniaturization needs or ak.a "More than Moore". This paper presents packaging technology trends and accelerated reliability testing methods currently being practiced. Then, it presents industry status on key advanced electronic packages, factors affecting accelerated solder joint reliability of area array packages, and IPC/JEDEC/Mil specifications for characterizations of assemblies under accelerated thermal and mechanical loading. Finally, it presents an examples demonstrating how Accelerated Testing and Analysis have been effectively employed in the development of complex spacecraft thereby reducing risk. Quantitative assessments necessarily involve the mathematics of probability and statistics. In addition, accelerated tests need to be designed which consider the desired risk posture and schedule for particular project. Such assessments relieve risks without imposing additional costs. and constraints that are not value added for a particular mission. Furthermore, in the course of development of complex systems, variances and defects will inevitably present themselves and require a decision concerning their disposition, necessitating quantitative assessments. In summary, this paper presents a comprehensive view point, from technology to systems, including the benefits and impact of accelerated testing in offsetting risk

Thermo-Mechanical Reliability and Electrical Performance of Indium Interconnects and Under Bump Metallization

This thesis presents reliability analysis of indium interconnects and Under Bump Metallization (UBM) in flip chip devices. Flip chip assemblies with the use of bump interconnections are frequently used, especially in high density, three-dimensional electronic devices. Currently there are many methods for interconnect bumping, all of which require UBM. The UBM is required for interconnection, diffusion resistance and quality electrical contact between substrate and device. Bonded silicon test vehicles were comprised of Indium bumps and three UBM compositions: Ti/Ni/Au (200\xc5/1000\xc5/500\xc5), Ti/Ni (200\xc5/1000\xc5), Ni (1000\xc5). UBM and indium were deposited by evaporation and exposed to unbiased accelerated temperature cycling(-55°C to 125°C, 15°C/min ramp rate). Finite Element Analysis (FEA) simulations were used to gain understanding of non-linear strain behavior of indium interconnects during temperature cycling. Experimental testing coupled with FEA simulations facilitated cycle-to-failure calculations. FEA results show plastic strain concentrations within indium bump below failure limits. It has been demonstrated that fabrication of Ti/Ni/Au, Ti/Ni, and Ni UBM stacks performed reliably within infant mortality failure region

Reliability assessment of a digital electronic board assembly using the physics-of-failure approach: a case study

An independent study has been carried out to assess the extent to which the physics-of-failure (PoF) technique can help in reliability enhancement and assessment of electronic assemblies. In particular, a specific case study has been conducted on a real, digital electronic board assembly with known failure modes. Results from the study include the simulation of substrate and component temperatures based on the knowledge of component power dissipation, board assembly materials and cooling methods of the board assembly. The fundamental frequencies and dynamic displacements of the board were computed from the vibration models. The thermal and vibration results were then used to model the damage accumulation at solder joints of the components to accurately predict failure trends and failure sites. These results are compared with field failure data and results from other computer aided engineering (CAE) tools