Enhancements of a clock-controlled running key generator

AbstractThe design of stream ciphers based on the synthesis of linear feedback shift registers (LFSRs) has been the research target of many cryptographers for more than 50 years.There is no general way for such a synthesis that results in design of a “secure” stream cipher. One of the design approaches is the use of basic design principles followed by properties testing procedures (system-theoretic approach).In our contribution we present some enhancements of the generator studied in [6], [7]. The new designed generators consist of more LFSRs, use different clocking schemes and different output functions. We discuss their cryptographic properties and security against selected known attacks on stream ciphers

A Distributed GUI-based Computer Control System for Atomic Physics Experiments

Atomic physics experiments often require a complex sequence of precisely timed computer controlled events. A distributed GUI-based control system designed with such experiments in mind, The Cicero Word Generator, is described. The system makes use of a client-server separation between a user interface for sequence design and a set of output hardware servers. Output hardware servers are designed to use standard National Instruments output cards, but the client-server nature allows this to be extended to other output hardware. Output sequences running on multiple servers and output cards can be synchronized using a shared clock. By using an FPGA-generated variable frequency clock, redundant buffers can be dramatically shortened, and a time resolution of 100ns achieved over effectively arbitrary sequence lengths

Satellite range delay simulator for a matrix-switched time division multiple-access network simulator

The Systems Integration, Test, and Evaluation (SITE) facility at NASA Lewis Research Center is presently configured as a satellite-switched time division multiple access (SS-TDMA) network simulator. The purpose of SITE is to demonstrate and evaluate advanced communication satellite technologies, presently embodied by POC components developed under NASA contracts in addition to other hardware, such as ground terminals, designed and built in-house at NASA Lewis. Each ground terminal in a satellite communications system will experience a different aspect of the satellite's motion due mainly to daily tidal effects and station keeping, hence a different duration and rate of variation in the range delay. As a result of this and other effects such as local oscillator instability, each ground terminal must constantly adjust its transmit burst timing so that data bursts from separate ground terminals arrive at the satellite in their assigned time slots, preventing overlap and keeping the system in synchronism. On the receiving end, ground terminals must synchronize their local clocks using reference transmissions received through the satellite link. A feature of the SITE facility is its capability to simulate the varying propagation delays and associated Doppler frequency shifts that the ground terminals in the network have to cope with. Delay is achieved by means of two NASA Lewis designed and built range delay simulator (RDS) systems, each independently controlled locally with front panel switches or remotely by an experiment control and monitor (EC/M) computer

A modified stream generator for the GSM encryption algorithms A5/1 and A5/2

Ergüler, İmran (Dogus Author)A5/1 and A5/2 are the GSM encryption algorithms that protect user data transmission over air. However, both of the A5/1 and A5/2 were cryptanalized by using different attack techniques such as time-memory trade off, divide and conquer and correlation attacks. In this study, we present a modified version of the A5/1 and A5/2 with offering security improvements to the vulnerabilities of the algorithms. By changing just the clocking mechanism of the shift registers used in the algorithms, it is shown that known attacks techniques become impractical.European Association for Signal Processing (EURASIP), KAREL, TUBITAK, NORTEL Networks - Business Without Boundaries, ARGELA Technologies

NVIDIA Regression Testing Utilities

Upgrades to the Android system on a Tegra chip may cause unintended hardware issues, including complications with clock generator and multiplexer components. Regression testing is required to ensure these impediments do not occur. Currently, manual testing of such components is time consuming and complex. We were tasked with developing utilities to automate this process. At the conclusion of our project, we were able to develop two tools that significantly reduced time spent on regression testing. The clock tree sanity tool can efficiently compare clock trees and return issues with clock components. Similarly, the pin multiplexer tool can read, write, and debug register values with great ease of use

The S2 VLBI Correlator: A Correlator for Space VLBI and Geodetic Signal Processing

We describe the design of a correlator system for ground and space-based VLBI. The correlator contains unique signal processing functions: flexible LO frequency switching for bandwidth synthesis; 1 ms dump intervals, multi-rate digital signal-processing techniques to allow correlation of signals at different sample rates; and a digital filter for very high resolution cross-power spectra. It also includes autocorrelation, tone extraction, pulsar gating, signal-statistics accumulation.Comment: 44 pages, 13 figure

Brain-wave measures of workload in advanced cockpits: The transition of technology from laboratory to cockpit simulator, phase 2

The present Phase 2 small business innovation research study was designed to address issues related to scalp-recorded event-related potential (ERP) indices of mental workload and to transition this technology from the laboratory to cockpit simulator environments for use as a systems engineering tool. The project involved five main tasks: (1) Two laboratory studies confirmed the generality of the ERP indices of workload obtained in the Phase 1 study and revealed two additional ERP components related to workload. (2) A task analysis' of flight scenarios and pilot tasks in the Advanced Concepts Flight Simulator (ACFS) defined cockpit events (i.e., displays, messages, alarms) that would be expected to elicit ERPs related to workload. (3) Software was developed to support ERP data analysis. An existing ARD-proprietary package of ERP data analysis routines was upgraded, new graphics routines were developed to enhance interactive data analysis, and routines were developed to compare alternative single-trial analysis techniques using simulated ERP data. (4) Working in conjunction with NASA Langley research scientists and simulator engineers, preparations were made for an ACFS validation study of ERP measures of workload. (5) A design specification was developed for a general purpose, computerized, workload assessment system that can function in simulators such as the ACFS