Wireless Broadcast with Network Coding: A Connected Dominating Sets Approach

We study network coding for multi-hop wireless networks. We focus the case of broadcasting, where one source transmits information to all the nodes in the network. Our goal is energy-efficient broadcasting, in other words, to minimize the number of transmissions for broadcasting to the entire network. To achieve this goal, we propose a family of methods that combine the use of network coding and connected dominating sets. They consists in rate selections using connected dominated sets (RAUDS: Rate Adjustment Using Dominating Sets, and an generalized version, MARAUDS). The main insight behind these methods is that their use of connected dominating sets, allows near-optimality in the core of the network, while they efficiently handle borders and non-uniformity. The main contribution is a formal proof of the performance of these families of algorithms. One main result is the comparison of performance between routing and these methods (and in general, network coding)

Energy Efficient IP over WDM Networks Using Network Coding

In this thesis we propose the use of network coding to improve the energy efficiency in core networks, by reducing the resources required to process traffic flows at intermediate nodes. We study the energy efficiency of the proposed scheme through three approaches: (i) developing a mixed integer linear programme (MILP) to optimise the use of network resources. (ii) developing a heuristic based on minimum hop routing. (iii) deriving an analytical bounds and closed form expressions. The results of the MILP model show that implementing network coding over typical networks can introduce savings up to 33% compared to the conventional architectures. The results of the heuristic show that the energy efficient minimum hop routing in network coding enabled networks achieves power savings approaching those of the MILP model. The analytically calculated power savings also confirm the savings achieved by the model. Furthermore, we study the impact of network topology on the savings obtained by implementing network coding. The results show that the savings increase as the hop count of the network topology increases. Using the derived expressions, we calculated the maximum power savings for regular topologies as the number of nodes grows. The power savings asymptotically approach 45% and 23% for the ring (and line) and star topology, respectively. We also investigate the use of network coding in 1+1 survivable IP over WDM networks. We study the energy efficiency of this scheme through MILP, a heuristic with five operating options, and analytical bounds. We evaluate the MILP and the heuristics on typical and regular network topologies. Implementing network coding can produce savings up to 37% on the ring topology and 23% considering typical topologies. We also study the impact of varying the demand volumes on the network coding performance. We also develop analytical bounds for the conventional 1+1 protection and the 1+1 with network coding to verify the results of the MILP and the heuristics and study the impact of topology, focusing on the full mesh and ring topologies, providing a detailed analysis considering the impact of the network size

MorphIC: A 65-nm 738k-Synapse/mm2^2 Quad-Core Binary-Weight Digital Neuromorphic Processor with Stochastic Spike-Driven Online Learning

Recent trends in the field of neural network accelerators investigate weight quantization as a means to increase the resource- and power-efficiency of hardware devices. As full on-chip weight storage is necessary to avoid the high energy cost of off-chip memory accesses, memory reduction requirements for weight storage pushed toward the use of binary weights, which were demonstrated to have a limited accuracy reduction on many applications when quantization-aware training techniques are used. In parallel, spiking neural network (SNN) architectures are explored to further reduce power when processing sparse event-based data streams, while on-chip spike-based online learning appears as a key feature for applications constrained in power and resources during the training phase. However, designing power- and area-efficient spiking neural networks still requires the development of specific techniques in order to leverage on-chip online learning on binary weights without compromising the synapse density. In this work, we demonstrate MorphIC, a quad-core binary-weight digital neuromorphic processor embedding a stochastic version of the spike-driven synaptic plasticity (S-SDSP) learning rule and a hierarchical routing fabric for large-scale chip interconnection. The MorphIC SNN processor embeds a total of 2k leaky integrate-and-fire (LIF) neurons and more than two million plastic synapses for an active silicon area of 2.86mm$^2$ in 65nm CMOS, achieving a high density of 738k synapses/mm$^2$. MorphIC demonstrates an order-of-magnitude improvement in the area-accuracy tradeoff on the MNIST classification task compared to previously-proposed SNNs, while having no penalty in the energy-accuracy tradeoff.Comment: This document is the paper as accepted for publication in the IEEE Transactions on Biomedical Circuits and Systems journal (2019), the fully-edited paper is available at https://ieeexplore.ieee.org/document/876400