3,536 research outputs found

    Emulation Platform for Network Wide Traffic Sampling and Monitoring

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    International audienceIt is of utmost importance for the network research community to have access to tools and testbeds to explore future directions for Internet traffic monitoring and engineering. Although many experimental solutions exist today, they tend to be highly specialized or to have a limited availability and openness. Through this work, we outline the monitoring capabilities limitations of these facilities and we present our emulation platform for network wide traffic monitoring as an answer to these limitations. Our platform presents a new approach for the emulation of Internet traffic and for its monitoring across the different routers. Through our solution, we put at the disposal of users a real traffic emulation service coupled to a set of libraries and tools capable of Cisco NetFlow data export and collection, the overall destined to run advanced applications for network wide traffic monitoring and optimization

    CERN Storage Systems for Large-Scale Wireless

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    The project aims at evaluating the use of CERN computing infrastructure for next generation sensor networks data analysis. The proposed system allows the simulation of a large-scale sensor array for traffic analysis, streaming data to CERN storage systems in an efficient way. The data are made available for offline and quasi-online analysis, enabling both long term planning and fast reaction on the environment

    Network emulation focusing on QoS-Oriented satellite communication

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    This chapter proposes network emulation basics and a complete case study of QoS-oriented Satellite Communication

    Achieving Functional Correctness in Large Interconnect Systems.

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    In today's semi-conductor industry, large chip-multiprocessors and systems-on-chip are being developed, integrating a large number of components on a single chip. The sheer size of these designs and the intricacy of the communication patterns they exhibit have propelled the development of network-on-chip (NoC) interconnects as the basis for the communication infrastructure in these systems. Faced with the interconnect's growing size and complexity, several challenges hinder its effective validation. During the interconnect's development, the functional verification process relies heavily on the use of emulation and post-silicon validation platforms. However, detecting and debugging errors on these platforms is a difficult endeavour due to the limited observability, and in turn the low verification capabilities, they provide. Additionally, with the inherent incompleteness of design-time validation efforts, the potential of design bugs escaping into the interconnect of a released product is also a concern, as these bugs can threaten the viability of the entire system. This dissertation provides solutions to enable the development of functionally correct interconnect designs. We first address the challenges encountered during design-time verification efforts, by providing two complementary mechanisms that allow emulation and post-silicon verification frameworks to capture a detailed overview of the functional behaviour of the interconnect. Our first solution re-purposes the contents of in-flight traffic to log debug data from the interconnect's execution. This approach enables the validation of the interconnect using synthetic traffic workloads, while attaining over 80% observability of the routes followed by packets and capturing valuable debugging information. We also develop an alternative mechanism that boosts observability by taking periodic snapshots of execution, thus extending the verification capabilities to run both synthetic traffic and real-application workloads. The collected snapshots enhance detection and debugging support, and they provide observability of over 50% of packets and reconstructs at least half of each of their routes. Moreover, we also develop error detection and recovery solutions to address the threat of design bugs escaping into the interconnect's runtime operation. Our runtime techniques can overcome communication errors without needing to store replicate copies of all in-flight packets, thereby achieving correctness at minimal area costsPhDComputer Science and EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/116741/1/rawanak_1.pd

    ICT Based HIL Validation of Voltage Control Coordination in Smart Grids Scenarios

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    This paper aims to validate the capability of renewable generation (ReGen) plants to provide online voltage control coordination ancillary service to the system operators in smart grids. Simulation studies about online coordination concepts from ReGen plants have already been identified in previous publications. However, here, the results are validated through a real-time Hardware-In-the-Loop framework using an exemplary benchmark grid area in Denmark as a base case that includes flexible renewable power plants providing voltage control functionality. The provision of voltage control support from ReGen plants is verified on a large-scale power system against the baseline scenario, considering the hierarchical industrial controller platforms used nowadays in power plants. Moreover, the verification of online voltage control support is carried out by taking into account a communication network as well as the associated data traffic patterns obtained from a real network. Based on the sets of recordings, guidelines and recommendations for practical implementation of the developed control algorithms for targeted ancillary service are made. This provides a deep insight for stakeholders, i.e., wind turbine and photo-voltaic system manufacturers and system operators, regarding the existing boundaries for current technologies and requirements for accommodating the new ancillary services in industrial application

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