10,511 research outputs found

    Re-thinking Analog Integrated Circuits in Digital Terms: A New Design Concept for the IoT Era

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    A steady trend towards the design of mostly-digital and digital-friendly analog circuits, suitable to integration in mainstream nanoscale CMOS by a highly automated design flow, has been observed in the last years to address the requirements of the emerging Internet of Things (IoT) applications. In this context, this tutorial brief presents an overview of concepts and design methodologies that emerged in the last decade, aimed to the implementation of analog circuits like Operational Transconductance Amplifiers, Voltage References and Data Converters by digital circuits. The current design challenges and application scenarios as well as the future perspectives and opportunities in the field of digital-based analog processing are finally discussed

    A Comprehensive Analysis of Error Sources in Electronic Fully Digital Impedance Bridges

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    open12sĂŹFully digital impedance bridges are emerging as measuring instruments for primary electrical impedance metrology and the realization of impedance units and scales. This article presents a comprehensive analysis of electronic fully digital impedance bridges for both generating (based on digital-to-analog converters) and digitizing (based on analog-to-digital converters) bridges. The sources of measurement error are analyzed in detail and expressed by explicit mathematical formulas ready to be applied to the specific bridge and measurement case of interest. The same can be employed also as a basis to optimize the design and the operating parameters of digital bridges and evaluate the measurement uncertainty. A practical application of the analysis to the digital bridges developed and measurements performed in the framework of an international research project is presented.openOrtolano, Massimo; Marzano, Martina; D'Elia, Vincenzo; Mai Tran, Ngoc Thanh; Rybski, Ryszard; Kaczmarek, Janusz; Koziol, Miroslaw; Musiol, Krzysztof; Christensen, Andreas Elmholdt; Callegaro, Luca; Kucera, Jan; Power, OliverOrtolano, Massimo; Marzano, Martina; D'Elia, Vincenzo; Mai Tran, Ngoc Thanh; Rybski, Ryszard; Kaczmarek, Janusz; Koziol, Miroslaw; Musiol, Krzysztof; Christensen, Andreas Elmholdt; Callegaro, Luca; Kucera, Jan; Power, Olive

    Analog processing by digital gates: fully synthesizable IC design for IoT interfaces

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    Analog integrated circuits do not take advantage of scaling and are easily the bottleneck in terms of cost and performance in Internet of Things (IoT) sensor nodes integrated in nanoscale technologies. While this challenge is most commonly addressed by devising more “digital friendly” analog cells based on traditional design concepts, the possibility to translate analog functions into digital, so that to implement them by true digital gates, is now emerging as a promising alternative. This last approach, which challenges the idea that “analog circuits will be always needed”, is presented in this tutorial starting from the theoretical background to its application in digital-based operational amplifiers, voltage references, oscillators and data converters integrated on silicon which have proposed in recent literature. The applicability of the concepts to the design of ICs which are natively portable across technology nodes and highly reconfigurable, thus enabling dynamic energy quality scaling, as well as a low design effort and a fast time-to-market will be described

    The Front end of Software-Defined Radio: Possibilities and Challenges

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    The use of mobile telephony has shown a spectacular\ud growth in the last 10 years. A side effect of this rapid\ud growth is an excess of mobile system standards. Therefore,\ud the Software-Defined-Radio (SDR) concept is emerging as\ud a potential pragmatic solution: it aims to build flexible radio\ud systems, which are multi-service, multi-standard, multiband,\ud re-configurable and re-programmable, by software.\ud First, this paper presents a global overview of SDR.\ud Furthermore, it discusses several front-end architectures of\ud SDR. The goal of this project is to generate knowledge about\ud designing part of the functionality of SDR, implemented by\ud rapid prototyping strategies. The focus is on the front end\ud of SDR. The technological roadmap is taken into account to\ud evaluate several architectures

    Guest editorial for the special issue on software-defined radio transceivers and circuits for 5G wireless communications

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    Yichuang Sun, Baoyong Chi, and Heng Zhang, Guest Editorial for the Special Issue on Software-Defined Radio Transceivers and Circuits for 5G Wireless Communications, published in IEEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 63 (1): 1-3, January 2016, doi: https://doi.org/10.1109/TCSII.2015.2506979.Peer reviewedFinal Accepted Versio

    Transistor-Level Synthesis of Pipeline Analog-to-Digital Converters Using a Design-Space Reduction Algorithm

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    A novel transistor-level synthesis procedure for pipeline ADCs is presented. This procedure is able to directly map high-level converter specifications onto transistor sizes and biasing conditions. It is based on the combination of behavioral models for performance evaluation, optimization routines to minimize the power and area consumption of the circuit solution, and an algorithm to efficiently constraint the converter design space. This algorithm precludes the cost of lengthy bottom-up verifications and speeds up the synthesis task. The approach is herein demonstrated via the design of a 0.13 ÎŒm CMOS 10 bits@60 MS/s pipeline ADC with energy consumption per conversion of only 0.54 pJ@1 MHz, making it one of the most energy-efficient 10-bit video-rate pipeline ADCs reported to date. The computational cost of this design is of only 25 min of CPU time, and includes the evaluation of 13 different pipeline architectures potentially feasible for the targeted specifications. The optimum design derived from the synthesis procedure has been fine tuned to support PVT variations, laid out together with other auxiliary blocks, and fabricated. The experimental results show a power consumption of 23 [email protected] V and an effective resolution of 9.47-bit@1 MHz. Bearing in mind that no specific power reduction strategy has been applied; the mentioned results confirm the reliability of the proposed approach.Ministerio de Ciencia e InnovaciĂłn TEC2009-08447Junta de AndalucĂ­a TIC-0281

    14-bit 2.2-MS/s sigma-delta ADC's

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    Interference of Periodic and Spread-Spectrum-Modulated Waveforms with Analog and Digital Communications

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    In this article, the effectiveness and the limitations of spread-spectrum (SS) modulation techniques employed in switching-mode power converters and in digital systems to mitigate interference with communication equipment are analyzed and discussed under the EMC standard perspective and under an information theoretical perspective, with reference to different real-world scenarios. Substantial difference between potential EMI issues in traditional analog radio/TV broadcasting, digital data lines, and digital links featuring advanced channel coding techniques, e.g. in emerging power line communication (PLC) systems, are highlighted. Practical recommendations on the adoption of SS modulations along with a general reflection on the evolution of EMC requirements are finally given
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