XNOR Neural Engine: a Hardware Accelerator IP for 21.6 fJ/op Binary Neural Network Inference

Binary Neural Networks (BNNs) are promising to deliver accuracy comparable to conventional deep neural networks at a fraction of the cost in terms of memory and energy. In this paper, we introduce the XNOR Neural Engine (XNE), a fully digital configurable hardware accelerator IP for BNNs, integrated within a microcontroller unit (MCU) equipped with an autonomous I/O subsystem and hybrid SRAM / standard cell memory. The XNE is able to fully compute convolutional and dense layers in autonomy or in cooperation with the core in the MCU to realize more complex behaviors. We show post-synthesis results in 65nm and 22nm technology for the XNE IP and post-layout results in 22nm for the full MCU indicating that this system can drop the energy cost per binary operation to 21.6fJ per operation at 0.4V, and at the same time is flexible and performant enough to execute state-of-the-art BNN topologies such as ResNet-34 in less than 2.2mJ per frame at 8.9 fps.Comment: 11 pages, 8 figures, 2 tables, 3 listings. Accepted for presentation at CODES'18 and for publication in IEEE Transactions on Computer-Aided Design of Circuits and Systems (TCAD) as part of the ESWEEK-TCAD special issu

An Asynchronous Multi-Sensor Micro Control Unit for Wireless Body Sensor Networks (WBSNs)

In this work, an asynchronous multi-sensor micro control unit (MCU) core is proposed for wireless body sensor networks (WBSNs). It consists of asynchronous interfaces, a power management unit, a multi-sensor controller, a data encoder (DE), and an error correct coder (ECC). To improve the system performance and expansion abilities, the asynchronous interface is created for handshaking different clock domains between ADC and RF with MCU. To increase the use time of the WBSN system, a power management technique is developed for reducing power consumption. In addition, the multi-sensor controller is designed for detecting various biomedical signals. To prevent loss error from wireless transmission, use of an error correct coding technique is important in biomedical applications. The data encoder is added for lossless compression of various biomedical signals with a compression ratio of almost three. This design is successfully tested on a FPGA board. The VLSI architecture of this work contains 2.68-K gate counts and consumes power 496-μW at 133-MHz processing rate by using TSMC 0.13-μm CMOS process. Compared with the previous techniques, this work offers higher performance, more functions, and lower hardware cost than other micro controller designs

Is Europe in the Driver's Seat? The Competitiveness of the European Automotive Embedded Systems Industry

This report is one of a series resulting from a project entitled ¿Competitiveness by Leveraging Emerging Technologies Economically¿ (COMPLETE), carried out by JRC-IPTS. Each of the COMPLETE studies illustrates in its own right that European companies are active on many fronts of emerging and disruptive ICT technologies and are supplying the market with relevant products and services. Nevertheless, the studies also show that the creation and growth of high tech companies is still very complex and difficult in Europe, and too many economic opportunities seem to escape European initiatives and ownership. COMPLETE helps to illustrate some of the difficulties experienced in different segments of the ICT industry and by growing potential global players. This report reflects the findings of a study conducted by Egil Juliussen and Richard Robinson, two senior experts from iSuppli Corporation on the Competitiveness of the European Automotive Embedded Software industry. The report starts by introducing the market, its trends, the technologies, their characteristics and their potential economic impact, before moving to an analysis of the competitiveness of the corresponding European industry. It concludes by suggesting policy options. The research, initially based on internal expertise and literature reviews, was complemented with further desk research, expert interviews, expert workshops and company visits. The results were ultimately reviewed by experts and also in a dedicated workshop. The report concludes that currently ICT innovation in the automotive industry is a key competence in Europe, with very little ICT innovation from outside the EU finding its way into EU automotive companies. A major benefit of a strong automotive ICT industry is the resulting large and valuable employment base. But future maintenance of automotive ICT jobs within the EU will only be possible if the EU continues to have high levels of product innovation.JRC.DDG.J.4-Information Societ

A multi-microcontroller-based hardware for deploying Tiny machine learning model

The tiny machine learning (TinyML) has been considered to applied on the edge devices where the resource-constrained micro-controller units (MCUs) were used. Finding a good platform to deploy the TinyML effectively is very crucial. The paper aims to propose a multiple micro-controller hardware platform for productively running the TinyML model. The proposed hardware consists of two dual-core MCUs. The first MCU is utilized for acquiring and processing input data, while the second is responsible for executing the trained TinyML network. Two MCUs communicate to each other using the universal asynchronous receiver-transmitter (UART) protocol. The multi-tasking programming technique is mainly applied on the first MCU to optimize the pre-processing new data. A three-phase motors faults classification TinyML model was deployed on the proposed system to evaluate the effectiveness. The experimental results prove that our proposed hardware platform was improved 34.8% the total inference time including pre-processing data of the proposed TinyML model in comparing with single micro-controller hardware platform