3,164 research outputs found
Efficient Quantum Algorithms for State Measurement and Linear Algebra Applications
We present an algorithm for measurement of -local operators in a quantum
state, which scales logarithmically both in the system size and the output
accuracy. The key ingredients of the algorithm are a digital representation of
the quantum state, and a decomposition of the measurement operator in a basis
of operators with known discrete spectra. We then show how this algorithm can
be combined with (a) Hamiltonian evolution to make quantum simulations
efficient, (b) the Newton-Raphson method based solution of matrix inverse to
efficiently solve linear simultaneous equations, and (c) Chebyshev expansion of
matrix exponentials to efficiently evaluate thermal expectation values. The
general strategy may be useful in solving many other linear algebra problems
efficiently.Comment: 17 pages, 3 figures (v2) Sections reorganised, several clarifications
added, results unchange
VLSI Implementation of Deep Neural Network Using Integral Stochastic Computing
The hardware implementation of deep neural networks (DNNs) has recently
received tremendous attention: many applications in fact require high-speed
operations that suit a hardware implementation. However, numerous elements and
complex interconnections are usually required, leading to a large area
occupation and copious power consumption. Stochastic computing has shown
promising results for low-power area-efficient hardware implementations, even
though existing stochastic algorithms require long streams that cause long
latencies. In this paper, we propose an integer form of stochastic computation
and introduce some elementary circuits. We then propose an efficient
implementation of a DNN based on integral stochastic computing. The proposed
architecture has been implemented on a Virtex7 FPGA, resulting in 45% and 62%
average reductions in area and latency compared to the best reported
architecture in literature. We also synthesize the circuits in a 65 nm CMOS
technology and we show that the proposed integral stochastic architecture
results in up to 21% reduction in energy consumption compared to the binary
radix implementation at the same misclassification rate. Due to fault-tolerant
nature of stochastic architectures, we also consider a quasi-synchronous
implementation which yields 33% reduction in energy consumption w.r.t. the
binary radix implementation without any compromise on performance.Comment: 11 pages, 12 figure
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