884 research outputs found

    Efficient FPGA implementation of high-throughput mixed radix multipath delay commutator FFT processor for MIMO-OFDM

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    This article presents and evaluates pipelined architecture designs for an improved high-frequency Fast Fourier Transform (FFT) processor implemented on Field Programmable Gate Arrays (FPGA) for Multiple Input Multiple Output Orthogonal Frequency Division Multiplexing (MIMO-OFDM). The architecture presented is a Mixed-Radix Multipath Delay Commutator. The presented parallel architecture utilizes fewer hardware resources compared to Radix-2 architecture, while maintaining simple control and butterfly structures inherent to Radix-2 implementations. The high-frequency design presented allows enhancing system throughput without requiring additional parallel data paths common in other current approaches, the presented design can process two and four independent data streams in parallel and is suitable for scaling to any power of two FFT size N. FPGA implementation of the architecture demonstrated significant resource efficiency and high-throughput in comparison to relevant current approaches within literature. The proposed architecture designs were realized with Xilinx System Generator (XSG) and evaluated on both Virtex-5 and Virtex-7 FPGA devices. Post place and route results demonstrated maximum frequency values over 400 MHz and 470 MHz for Virtex-5 and Virtex-7 FPGA devices respectively

    Visualization on colour based flow vector of thermal image for movement detection during interactive session

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    Recently thermal imaging is exploited in applications such as motion and face detection. It has drawn attention many researchers to build such technology to improve lifestyle. This work proposed a technique to detect and identify a motion in sequence images for the application in security monitoring system or outdoor surveillance. Conventional system might cause false information with the present of shadow. Thus, methods employed in this work are Canny edge detector method, Lucas Kanade and Horn Shunck algorithms, to overcome the major problem when using thresholding method, which is only intensity or pixel magnitude is considered instead of relationships between the pixels. The results obtained could be observed in flow vector parameter and the segmentation colour based image for the time frame from 1 to 10 seconds. The visualization of both the parameters clarified the movement and changes of pixel intensity between two frames by the supportive colour segmentation, either in smooth or rough motion. Thus, this technique may contribute to others application such as biometrics, military system, and surveillance machine

    A 64-point Fourier transform chip for high-speed wireless LAN application using OFDM

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    In this article, we present a novel fixed-point 16-bit word-width 64-point FFT/IFFT processor developed primarily for the application in the OFDM based IEEE 802.11a Wireless LAN (WLAN) baseband processor. The 64-point FFT is realized by decomposing it into a 2-D structure of 8-point FFTs. This approach reduces the number of required complex multiplications compared to the conventional radix-2 64-point FFT algorithm. The complex multiplication operations are realized using shift-and-add operations. Thus, the processor does not use any 2-input digital multiplier. It also does not need any RAM or ROM for internal storage of coefficients. The proposed 64-point FFT/IFFT processor has been fabricated and tested successfully using our in-house 0.25 ?m BiCMOS technology. The core area of this chip is 6.8 mm2. The average dynamic power consumption is 41 mW @ 20 MHz operating frequency and 1.8 V supply voltage. The processor completes one parallel-to-parallel (i. e., when all input data are available in parallel and all output data are generated in parallel) 64-point FFT computation in 23 cycles. These features show that though it has been developed primarily for application in the IEEE 802.11a standard, it can be used for any application that requires fast operation as well as low power consumption

    FPGA Based Efficient OFDM Based Design and Implementation for Data and Image Transmission for Healthcare

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    Enormous growth in telecommunication industry demands for high speed data transmission with better quality of service (Qos). The telecommunication networks are offering the services which is from 1 Mbps to several Mbps of speed. However, most of the existing techniques address to assure the very high speed data for multimedia communication. The multimedia data may find a suitable application in healthcare system. The OFDM modulation technique promises to provide the multimedia services at rather high speed using the spectrum more efficient compared traditional scheme like TDMA, FDMA. The orthogonality of carriers eliminates the interference among the closely packed carriers and offers comparatively efficient bandwidth. The OFDM design requires choosing proper parameter selection. Important feature of OFDM is that the multipaths are effectively eliminated by choosing a higher cyclic prefix values which, gives significant results but causing more energy loss. This paper presents an efficient design for OFDMtransceiver by using FPGA. The design is modeled and simulated using Matlab Simulink and finally the design is coded using Verilog RTL and simulated in modelsim and synthesizing and implementation is done using in Xilinx EDA tool. The image type of data is taken for transmission in the proposed OFDM transceiver system. The received image type data achieves PSNR value of 29.920dB and the binary input data achieves 36.06% improvement in power utilization and less area overhead. The paper also shows the improvement in area and power compared to existing authors.Published By: Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP) © Copyright: All rights reserved

    Design And Implementation Of Radix-4 Fast Fourier Transform In Asia Chip With 0.18 M Standard CMOS Technology [TK5102.9. S624 2008 f rb].

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    Jelmaan Fourier pantas (FFT) merupakan blok yang penting dan digunakan secara meluas dalam algoritma pemprosesan isyarat digital. The Fast Fourier Transform (FFT) is a critical block and widely used in digital signal processing algorithm

    Feasibility of Using Bandwidth Efficient Modulation to Upgrade the CMS Tracker Readout Optical Links

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    Plans to upgrade the LHC after approximately 10 years of operation are currently being considered at CERN. A tenfold increase in luminosity delivered to the experiments is envisaged in the so-called Super LHC (SLHC). This will undoubtedly give rise to significantly larger data volumes from the detectors, requiring faster data readout. The possibility of upgrading the CMS Tracker analog readout optical links using a bandwidth efficient digital modulation scheme for deployment in the SLHC has been extensively explored at CERN. Previous theoretical and experimental studies determined the achievable data rate using a system based on Quadrature Amplitude Modulation (QAM) to be ~3-4Gbit/s (assuming no error correction is used and for an error rate of ~10-9). In this note we attempt to quantify the feasibility of such an upgrade in terms of hardware implementation complexity, applicability to the high energy physics (HEP) environment, technological feasibility and R&D effort required.Comment: CERN CMS Note. 16 pages, 10 figure

    Channel Estimation in Multicarrier Communication Systems

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    The data rate and spectrum efficiency of wireless mobile communications have been significantly improved over the last decade or so. Recently, the advanced systems such as 3GPP LTE and terrestrial digital TV broadcasting have been sophisticatedly developed using OFDM and CDMA technology. In general, most mobile communication systems transmit bits of information in the radio space to the receiver. The radio channels in mobile radio systems are usually multipath fading channels, which cause inter-symbol interference (ISI) in the received signal. To remove ISI from the signal, there is a need of strong equalizer which requires knowledge on the channel impulse response (CIR).This is primarily provided by a separate channel estimator. Usually the channel estimation is based on the known sequence of bits, which is unique for a certain transmitter and which is repeated in every transmission burst. Thus, the channel estimator is able to estimate CIR for each burst separately by exploiting the known transmitted bits and the corresponding received samples. In this thesis we investigate and compare various efficient channel estimation schemes for OFDM systems which can also be extended to MC DS-CDMA systems.The channel estimation can be performed by either inserting pilot tones into all subcarriers of OFDM symbols with a specific period or inserting pilot tones into each OFDM symbol. Two major types of pilot arrangement such as block type and comb type pilot have been focused employing Least Square Error (LSE) and Minimum Mean Square Error (MMSE) channel estimators. Block type pilot sub-carriers is especially suitable for slow-fading radio channels whereas comb type pilots provide better resistance to fast fading channels. Also comb type pilot arrangement is sensitive to frequency selectivity when comparing to block type arrangement. However, there is another supervised technique called Implicit Training (IT) based channel estimation which exploits the first order statistics in the received data, induced by superimposing periodic training sequences with good correlation properties, along with the information symbols. Hence, the need for additional time slots for training the equalizer is avoided. The performance of the estimators is presented in terms of the mean square estimation error (MSEE) and bit error rate (BER)
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