86 research outputs found
Zone-based verification of timed automata: extrapolations, simulations and what next?
Timed automata have been introduced by Rajeev Alur and David Dill in the
early 90's. In the last decades, timed automata have become the de facto model
for the verification of real-time systems. Algorithms for timed automata are
based on the traversal of their state-space using zones as a symbolic
representation. Since the state-space is infinite, termination relies on finite
abstractions that yield a finite representation of the reachable states.
The first solution to get finite abstractions was based on extrapolations of
zones, and has been implemented in the industry-strength tool Uppaal. A
different approach based on simulations between zones has emerged in the last
ten years, and has been implemented in the fully open source tool TChecker. The
simulation-based approach has led to new efficient algorithms for reachability
and liveness in timed automata, and has also been extended to richer models
like weighted timed automata, and timed automata with diagonal constraints and
updates.
In this article, we survey the extrapolation and simulation techniques, and
discuss some open challenges for the future.Comment: Invited contribution at FORMATS'2
Constraint LTL Satisfiability Checking without Automata
This paper introduces a novel technique to decide the satisfiability of
formulae written in the language of Linear Temporal Logic with Both future and
past operators and atomic formulae belonging to constraint system D (CLTLB(D)
for short). The technique is based on the concept of bounded satisfiability,
and hinges on an encoding of CLTLB(D) formulae into QF-EUD, the theory of
quantifier-free equality and uninterpreted functions combined with D. Similarly
to standard LTL, where bounded model-checking and SAT-solvers can be used as an
alternative to automata-theoretic approaches to model-checking, our approach
allows users to solve the satisfiability problem for CLTLB(D) formulae through
SMT-solving techniques, rather than by checking the emptiness of the language
of a suitable automaton A_{\phi}. The technique is effective, and it has been
implemented in our Zot formal verification tool.Comment: 39 page
Improved Algorithms for Parity and Streett objectives
The computation of the winning set for parity objectives and for Streett
objectives in graphs as well as in game graphs are central problems in
computer-aided verification, with application to the verification of closed
systems with strong fairness conditions, the verification of open systems,
checking interface compatibility, well-formedness of specifications, and the
synthesis of reactive systems. We show how to compute the winning set on
vertices for (1) parity-3 (aka one-pair Streett) objectives in game graphs in
time and for (2) k-pair Streett objectives in graphs in time
. For both problems this gives faster algorithms for dense
graphs and represents the first improvement in asymptotic running time in 15
years
starMC: an automata based CTL* model checker
Model-checking of temporal logic formulae is a widely used technique for the verification of systems. CTL [Image: see text] is a temporal logic that allows to consider an intermix of both branching behaviours (like in CTL) and linear behaviours (LTL), overcoming the limitations of LTL (that cannot express “possibility”) and CTL (cannot fully express fairness). Nevertheless CTL [Image: see text] model-checkers are uncommon. This paper presents (1) the algorithms for a fully symbolic automata-based approach for CTL [Image: see text] , and (2) their implementation in the open-source tool starMC, a CTL [Image: see text] model checker for systems specified as Petri nets. Testing has been conducted on thousands of formulas over almost a hundred models. The experiments show that the fully symbolic automata-based approach of starMC can compute the set of states that satisfy a CTL [Image: see text] formula for very large models (non trivial formulas for state spaces larger than 10(480) states are evaluated in less than a minute)
26. Theorietag Automaten und Formale Sprachen 23. Jahrestagung Logik in der Informatik: Tagungsband
Der Theorietag ist die Jahrestagung der Fachgruppe Automaten und Formale Sprachen der Gesellschaft für Informatik und fand erstmals 1991 in Magdeburg statt. Seit dem Jahr 1996 wird der Theorietag von einem eintägigen Workshop mit eingeladenen Vorträgen begleitet. Die Jahrestagung der Fachgruppe Logik in der Informatik der Gesellschaft für Informatik fand erstmals 1993 in Leipzig statt. Im Laufe beider Jahrestagungen finden auch die jährliche Fachgruppensitzungen statt. In diesem Jahr wird der Theorietag der Fachgruppe Automaten und Formale Sprachen erstmalig zusammen mit der Jahrestagung der Fachgruppe Logik in der Informatik abgehalten. Organisiert wurde die gemeinsame Veranstaltung von der Arbeitsgruppe Zuverlässige Systeme des Instituts für Informatik an der Christian-Albrechts-Universität Kiel vom 4. bis 7. Oktober im Tagungshotel Tannenfelde bei Neumünster. Während des Tre↵ens wird ein Workshop für alle Interessierten statt finden. In Tannenfelde werden • Christoph Löding (Aachen) • Tomás Masopust (Dresden) • Henning Schnoor (Kiel) • Nicole Schweikardt (Berlin) • Georg Zetzsche (Paris) eingeladene Vorträge zu ihrer aktuellen Arbeit halten. Darüber hinaus werden 26 Vorträge von Teilnehmern und Teilnehmerinnen gehalten, 17 auf dem Theorietag Automaten und formale Sprachen und neun auf der Jahrestagung Logik in der Informatik. Der vorliegende Band enthält Kurzfassungen aller Beiträge. Wir danken der Gesellschaft für Informatik, der Christian-Albrechts-Universität zu Kiel und dem Tagungshotel Tannenfelde für die Unterstützung dieses Theorietags. Ein besonderer Dank geht an das Organisationsteam: Maike Bradler, Philipp Sieweck, Joel Day. Kiel, Oktober 2016 Florin Manea, Dirk Nowotka und Thomas Wilk
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