Characterization Methodology, Modeling, and Converter Design for 600 V Enhancement-Mode GaN FETs

Gallium Nitride (GaN) power devices are an emerging technology that have only become available commercially in the past few years. This new technology enables the design of converters at higher frequencies and efficiencies than those achievable with conventional Si devices. This dissertation reviews the unique characteristics, commercial status, and design challenges that surround GaN FETs, in order to provide sufficient background to potential GaN-based converter designers.Methodology for experimentally characterizing a GaN FET was also presented, including static characterization with a curve tracer and impedance analyzer, as well as dynamic characterization in a double pulse test setup. This methodology was supplemented by additional tests to determine losses caused by Miller-induced cross talk, and the tradeoff between these losses and overlap losses was studied for one example device.Based on analysis of characterization results, a simplified model was developed to describe the overall switching behavior and some unique features of the device. The impact of the Miller effect during the turn-on transient was studied, as well as the dynamic performance of GaN at elevated temperature.Furthermore, solutions were proposed for several key design challenges in GaN-based converters. First, a driver-integrated overcurrent and short-circuit protection scheme was developed, based on the relationship between gate voltage and drain current in GaN gate injection transistors. Second, the limitations on maximum utilization of current and voltage in a GaN FET were studied, particularly the voltage overshoots following turn-on and turn-off switching transients, and the effective cooling of GaN FETs in higher power operation. A thermal design was developed for heat extraction from bottom-cooled surface-mount devices. These solutions were verified in a GaN-based full-bridge single-phase inverter

Characterization and Utilization of 600 V GaN GITs for 4.5 kW Single Phase Inverter Design

Superior properties allow for faster switching and higher power density converters. However, the fast switching capability of GaN, while theoretically beneficial to converter design, presents several challenges due to the presence of printed circuit board (PCB) and device parasitics. Therefore, it is imperative that the results of device characterization reflect actual device behavior in order to adequately model the device for converter design. This thesis focuses on characterization and utilization of 600 V/30 A Gallium Nitride gate injection transistors, or GaN GITs. The experimental data from static and dynamic characterization was used to maximize the performance of the devices in each phase leg of a 4.5 kW, single-phase, full-bridge inverter. The impact of PCB and device parasitics on switching behavior was also investigated, and a trade-off study of switching loss, overshoot voltage, and dead time loss is presented. Device packaging is also of interest regarding the design of high-frequency devices. This thesis compares the impact of two package designs for the GIT device by designing two separate inverters with the same specifications utilizing the different packages. Finally, due to the lower critical energy of the GaN HEMT during a short circuit, this thesis studies the short-circuit robustness of the devices. The performance of a unique gate sensing protection scheme is compared between two different packages, and the impact of the gate drive and protection circuit design parameters on performance is evaluated

Amplifier Architectures for Wireless Communication Systems

Ever-increasing demand in modern wireless communication systems leads researchers to focus on design challenges on one of the main components of RF transmitters and receivers, namely amplifiers. On the transmitter side, enhanced efficiency and broader bandwidth over single and multiple bands on power amplifiers will help to have superior performance in communication systems. On the other hand, for the receiver side, having low noise and high gain will be necessary to ensure good quality transmission over such systems. In light of these considerations, a unique approach in design methodologies are studied with low noise amplifiers (LNAs) for RF receivers and the Doherty technique is analyzed for efficiency enhancement for power amplifiers (PA) on the transmitters. This work can be outlined in two parts. In the first part, Low Noise RF amplifier designs with Bipolar Junction Transistor (BJT) are studied to achieve better performing LNAs for receivers. The aim is to obtain a low noise figure while optimizing the bandwidth and achieving a maximum available gain. There are two designs that are operating at different center frequencies and utilizing different transistors. The first design is a wideband low-noise amplifier operating at 2 GHz with a high power BJT. The proposed design uses only distributed elements to realize the input and output matching networks. Additionally, a passive DC bias network is used instead of an active DC bias network to avoid possible complications due to the lumped elements parasitic effects. The matching networks are designed based on the reflection coefficients that are derived based on the transistor’s available regions. The second design is a low voltage standing wave ratio (VSWR) amplifier with a low noise figure operating at 3 GHz. This design is following the same method as in the first design. Both these amplifiers are designed to operate in broadband applications and can be good candidates for base stations. The second part of this work focuses on the transmitter side of communication systems. For this part, Doherty Power Amplifier (DPA) is analyzed as an efficiency enhancement technique for PAs. A modified architecture is proposed to have wider bandwidth and higher efficiency. In the proposed design, the quarter-wave impedance inverter was eliminated. The input and the output of the main and peak amplifiers are matched to the load directly. Additionally, the input and output matching networks are realized only using distributed elements. The selected transistor for this design is a 10 W Gallium Nitride (GaN). The fabricated amplifier operates at the center frequency of 2 GHz and provides 40% fractional bandwidth, 54% of maximum power-added efficiency, and 12.5 dB or better small-signal gain. The design is showing promising results to be a good candidate for better-performing transmitters over the L- and S- band

Continuous Mode High Efficiency Power Amplifier Design for X Band

This thesis is focused on the investigation and implementation of novel techniques for the design of X band (8 - 12GHz) power amplifiers. One of the main topics is the expansion and novel implementation of continuous mode theory, with the intention of improving the bandwidth and efficiency of X band power amplifiers. This work builds upon the Class B/J continuous mode theory to incorporate cases where <[ZF0] 6= RL, not described by the original Class B/J theory, with a tool called the “clipping contour”. The clipping contour tool shows a graphical representation on the Smith chart of the boundary between impedances generating a voltage waveform which will modulate or “clip” the current waveform, and a voltage waveform which will leave the current waveform unaltered. This non-clipping space is shown, with measured load pull and amplifier data, to represent the maximum efficiency case for a given ZF0, thus the clipping contour tool thus gives designers the ability to predict the areas of highest efficiency and power given any ZF0, without the need to use costly, time consuming multi harmonic load pull techniques. Push pull amplifiers using quarter wave coupled line baluns are proposed as an ideal matching topology to exploit this new tool. Various balun topologies are studied using a novel extended transmission line model. This model is shown to predict accurately and explain the “trace separation” effect seen in planar baluns and not their 3D coaxial cable equivalents. It also forms the basis of analysis which results in a powerful new equation capable of guaranteeing the elimination of trace separation completely, without compromising performance. This equation is used to design an optimal balun which possesses the largest fractional bandwidth (130%) of any balun ever published on single layer thin film Alumina, whilst simultaneously eliminating trace separation. The optimised Alumina baluns are used to construct push pull output demonstrator circuits which show efficiencies of 40% over greater than an octave bandwidth, a significant advancement of any other comparable published work. These techniques demonstrate the potential to exceed double octave bandwidths with efficiencies greater than 40% once optimised. Initial investigations on MMIC and 2.5D processes show the potential to replicate the Alumina performance over octave and decade bandwidths respectively

Composite power semiconductor switches for high-power applications

It is predicted that 80 % of the world’s electricity will flow through power electronic based converters by 2030, with a growing demand for renewable technolo gies and the highest levels of efficiency at every stage from generation to load. At the heart of a power electronic converter is the power semiconductor switch which is responsible for controlling and modulating the flow of power from the input to the output. The requirements for these power semiconductor switches are vast, and include: having an extremely low level of conduction and switching losses; being a low source of electromagnetic noise, and not being susceptible to external Electromagnetic Interference (EMI); and having a good level of ruggedness and reliability. These high-performance switches must also be economically viable and not have an unnecessarily large manufacturing related carbon footprint. This thesis investigates the switching performance of the two main semiconductor switches used in high-power applications — the well-established Silicon (Si)-Insulated-Gate Bipolar Transistor (IGBT) and the state-of-the-art Wide-Bandgap (WBG) Silicon-Carbide (SiC)-Metal–Oxide–Semiconductor Field-Effect Transistor (MOSFET). The SiC-MOSFET is ostensibly a better device than the Si-IGBT due to the lower level of losses, however the cost of the device is far greater and there are characteristics which can be troublesome, such as the high levels of oscillatory behaviour at the switching edges which can cause serious Electromagnetic Compatibility (EMC) issues. The operating mechanism of these devices, the materials which are used to make them, and their auxiliary components are critically analysed and discussed. This includes a head-to-head comparison of the two high-capacity devices in terms of their losses and switching characteristics. The design of a high-power Double-Pulse Test Rig (DPTR) and the associated high-bandwidth measurement platform is presented. This test rig is then extensively used throughout this thesis to experimentally characterise the switching performance of the aforementioned high-capacity power semiconductor devices. A hybrid switch concept — termed “The Diverter” — is investigated, with the motivation of achieving improved switching performance without the high-cost of a full SiC solution. This comprises a fully rated Si-IGBT as the main conduction device and a part-rated SiC-MOSFET which is used at the turn-off. The coordinated switching scheme for the Si/SiC-Diverter is experimentally examined to determine the required timings which yield the lowest turn-off loss and the lowest level of oscillatory behaviour and other EMI precursors. The thermal stress imposed on the part-rated SiC-MOSFET is considered in a junction temperature simulation and determined to be negligible. This concept is then analysed in a grid-tied converter simulation and compared to a fully rated SiC-MOSFET and Si-IGBT. A conduction assistance operating mode, which solely uses the part-rated SiC-MOSFET when within its rating, is also investigated. Results show that the Diverter achieves a significantly lower level of losses compared to a Si-IGBT and only marginally higher than a full SiC solution. This is achieved at a much lower cost than a full SiC solution and may also provide a better method of achieving high-current SiC switche