E-BLOW: E-Beam Lithography Overlapping aware Stencil Planning for MCC System

Electron beam lithography (EBL) is a promising maskless solution for the technology beyond 14nm logic node. To overcome its throughput limitation, recently the traditional EBL system is extended into MCC system. %to further improve the throughput. In this paper, we present E-BLOW, a tool to solve the overlapping aware stencil planning (OSP) problems in MCC system. E-BLOW is integrated with several novel speedup techniques, i.e., successive relaxation, dynamic programming and KD-Tree based clustering, to achieve a good performance in terms of runtime and solution quality. Experimental results show that, compared with previous works, E-BLOW demonstrates better performance for both conventional EBL system and MCC system

Algorithms for DFM in electronic design automation

As the dimension of features in integrated circuits (IC) keeps shrinking to fulfill Moore’s law, the manufacturing process has no choice but confronting the limit of physics at the expense of design flexibility. On the other hand, IC designs inevitably becomes more complex to meet the increasing demand of computational power. To close this gap, design for manufacturing (DFM) becomes the key to enable an easy and low-cost IC fabrication. Therefore, efficient electronic design automation (EDA) algorithms must be developed for DFM to address the design constraints and help the designers to better facilitate the manufacture process. As the core of manufacturing ICs, conventional lithography systems (193i) reach their limit for the 22 nm technology node and beyond. Consequently, several advanced lithography techniques are proposed, such as multiple patterning lithography (MPL), extreme ultra-violet lithography (EUV), electron beam (E-beam), and block copolymer directed self-assembly (DSA); however, DFM algorithms are essential for them to achieve better printability of a design. In this dissertation, we focus on analyzing the compatibility of designs and various advanced lithography techniques, and develop efficient algorithms to enable the manufacturing. We first explore E-Beam, one of the promising candidates for IC fabrication beyond the 10 nm technology node. To address its low throughput issue, the character projection technique has been proposed, and its stencil planning can be optimized with an awareness of overlapping characters. 2D stencil planning is proved NP-Hard. With the assumption of standard cells, the 2D problem can be partitioned into 1D row ordering subproblems; however, it is also considered hard, and no efficient optimal solution has been provided so far. We propose a polynomial time optimal algorithm to solve the 1D row ordering problem, which serves as the major subroutine for the entire stencil planning problem. Technical proofs and experimental results verify that our algorithm is efficient and indeed optimal. As the most popular and practical lithography technique, MPL utilizes multiple exposures to print a single layout and thus allows placement of features within the minimum distance. Therefore, a feasible decomposition of the layout is a must to adopt MPL, and it is usually formulated as a graph k-coloring problem, which is computationally difficult for k > 2. We study the k-colorability of rectangular and diagonal grid graphs as induced subgraphs of a rectangular or diagonal grid respectively, since it has direct applications in printing contact/via layouts. It remains an open question on how hard it is to color grid graphs due to their regularity and sparsity. In this dissertation, we conduct a complete analysis of the k-coloring problems on rectangular and diagonal grid graphs, and particularly the NP-completeness of 3-coloring on a diagonal grid graph is proved. In practice, we propose an exact 3-coloring algorithm for those graphs and conduct experiments to verify its performance and effectiveness. Besides, we also develop an efficient algorithm for model based MPL, because it is more expensive but accurate than the rule based decomposition. As one of the alternative lithography techniques, block copolymer directed self-assembly (DSA) is studied. It has emerged as a low-cost, high- throughput option in the pursuit of alternatives to traditional optical lithography. However, issues of defectivity have hampered DSA’s viability for large-scale patterning. Recent studies have shown the copolymer fill level to be a crucial factor in defectivity, as template overfill can result in malformed DSA structures and poor LCDU after etching. For this reason, the use of sub-DSA resolution assist features (SDRAFs) as a method of evening out template density has been demonstrated. In this dissertation, we propose an algorithm to place SDRAFs in random logic contact/via layouts. By adopting this SDRAF placement scheme, we can significantly improve the density unevenness and the resources used are also optimized. We also apply our knowledge in coloring grid graphs to the problem of group-and-coloring in DSA-MPL hybrid lithography. We derive a solution to group-3-coloring and prove the NP-completeness of grouping-2-coloring

L-Shape based Layout Fracturing for E-Beam Lithography

Layout fracturing is a fundamental step in mask data preparation and e-beam lithography (EBL) writing. To increase EBL throughput, recently a new L-shape writing strategy is proposed, which calls for new L-shape fracturing, versus the conventional rectangular fracturing. Meanwhile, during layout fracturing, one must minimize very small/narrow features, also called slivers, due to manufacturability concern. This paper addresses this new research problem of how to perform L-shaped fracturing with sliver minimization. We propose two novel algorithms. The first one, rectangular merging (RM), starts from a set of rectangular fractures and merges them optimally to form L-shape fracturing. The second algorithm, direct L-shape fracturing (DLF), directly and effectively fractures the input layouts into L-shapes with sliver minimization. The experimental results show that our algorithms are very effective

Layout decomposition for triple patterning lithography

Nowadays the semiconductor industry is continuing to advance the limits of physics as the feature size of the chip keeps shrinking. Products of the 22 nm technology node are already available on the market, and there are many ongoing research studies for the 14/10 nm technology nodes and beyond. Due to the physical limitations, the traditional 193 nm immersion lithography is facing huge challenges in fabricating such tiny features. Several types of next-generation lithography techniques have been discussed for years, such as {\em extreme ultra-violet} (EUV) lithography, {\em E-beam direct write}, and {\em block copolymer directed self-assembly} (DSA). However, the source power for EUV is still an unresolved issue. The low throughput of E-beam makes it impractical for massive productions. DSA is still under calibration in research labs and is not ready for massive industrial deployment. Traditionally features are fabricated under single litho exposure. As feature size becomes smaller and smaller, single exposure is no longer adequate in satisfying the quality requirements. {\em Double patterning lithography} (DPL) utilizes two litho exposures to manufacture features on the same layer. Features are assigned to two masks, with each mask going through a separate litho exposure. With one more mask, the effective pitch is doubled, thus greatly enhancing the printing resolution. Therefore, DPL has been widely recognized as a feasible lithography solution in the sub-22 nm technology node. However, as the technology continues to scale down to 14/10 nm and beyond, DPL begins to show its limitations as it introduces a high number of stitches, which increases the manufacturing cost and potentially leads to functional errors of the circuits. {\em Triple pattering lithography} (TPL) uses three masks to print the features on the same layer, which further enhances the printing resolution. It is a natural extension for DPL with three masks available, and it is one of the most promising solutions for the 14/10 nm technology node and beyond. In this thesis, TPL decomposition for standard-cell-based designs is extensively studied. We proposed a polynomial time triple patterning decomposition algorithm which guarantees finding a TPL decomposition if one exists. For complex designs with stitch candidates, our algorithm is able to find a solution with the optimal number of stitches. For standard-cell-based designs, there are additional coloring constraints where the same type of cell should be fabricated following the same pattern. We proposed an algorithm that is guaranteed to find a solution when one exists. The framework of the algorithm is also extended to pattern-based TPL decompositions, where the cost of a decomposition can be minimized given a library of different patterns. The polynomial time TPL algorithm is further optimized in terms of runtime and memory while keeping the solution quality unaffected. We also studied the TPL aware detailed placement problem, where our approach is guaranteed to find a legal detailed placement satisfying TPL coloring constraints as well as minimizing the {\em half-perimeter wire length} (HPWL). Finally, we studied the problem of performance variations due to mask misalignment in {\em multiple patterning decompositions} (MPL). For advanced technology nodes, process variations (mainly mask misalignment) have significant influences on the quality of fabricated circuits, and often lead to unexpected power/timing degenerations. Mask misalignment would complicate the way of simulating timing closure if engineers do not understand the underlying effects of mask misalignment, which only exists in multiple patterning decompositions. We mathematically proved the worst-case scenarios of coupling capacitance incurred by mask misalignment in MPL decompositions. A graph model is proposed which is guaranteed to compute the tight upper bound on the worst-case coupling capacitance of any MPL decompositions for a given layout

Combined Electron Beam Lithography

Tato práce se zabývá reliéfní elektronovou litografií a přípravou difrakčních optických elementů. Řešena jsou tři témata. Prvním tématem je reliéfní kombinovaná elektronová litografie, kde je cílem zkombinovat expozice dvou systémů s rozdílnou energií elektronů primárního svazku. Kombinovaná technika vede k efektivnějšímu využití jednotlivých systémů, kdy se různé struktury lépe připravují jinými energiemi elektronů v primárním svazku. Dalším tématem je optimalizace hranic objektů exponovaných struktur, které jsou definovány obrazovými vstupy. Zkoumá se vliv této optimalizace na rychlost přípravy expozičních dat, na dobu expozice a na optickou odezvu testovaných struktur. Třetím tématem je zkoumání možností přípravy hlubokých víceúrovňových difrakčních optických elementů do bloků plexiskla, jako náhrada soustavy rezist/substrát. S tím se pojí nový způsob zápisu, který minimalizuje teplotní zátěž na plexisklo během expozice elektronovým svazkem a zároveň zvyšuje homogenitu výsledného motivu. V této části byla dále navržena metoda výpočtu expozičních dávek specifických víceúrovňových struktur vycházející z existujících modelů pro výpočet korekcí jevu blízkosti, která minimalizuje čas výpočtu expozičních dávek.This thesis deals with grayscale e-beam lithography and diffractive optical elements fabrication. Three topics are addressed. The first topic is combined grayscale e-beam lithography. The goal of this task is combining exposures performed by two systems with various beam energies. This combined technique leads to a better usage of both systems because various structures can be more easily prepared by one electron beam energy than by the other. The next topic is the optimization of shape borders of exposing structures that are defined by image input. The influence of such optimization on exposure data preparation is evaluated, as well as the exposure time and the change of optical properties of testing structures. The possibility of deep multilevel diffractive optical element fabrication in plexiglass blocks is researched as the third topic. Plexiglass can replace the system of a resist and a substrate. A new approach to writing down the structures by electron beam is presented, minimizing thermal stress on the plexiglass block during the exposure. The writing method also improves the homogeneity of exposed motifs. A method for computing the exposure dose for specific multilevel structures was designed. This method is based on the existing model of proximity effect computation and it minimizes the computing time necessary to obtain the exposure doses.

Micro-Resonators: The Quest for Superior Performance

Microelectromechanical resonators are no longer solely a subject of research in university and government labs; they have found a variety of applications at industrial scale, where their market is predicted to grow steadily. Nevertheless, many barriers to enhance their performance and further spread their application remain to be overcome. In this Special Issue, we will focus our attention to some of the persistent challenges of micro-/nano-resonators such as nonlinearity, temperature stability, acceleration sensitivity, limits of quality factor, and failure modes that require a more in-depth understanding of the physics of vibration at small scale. The goal is to seek innovative solutions that take advantage of unique material properties and original designs to push the performance of micro-resonators beyond what is conventionally achievable. Contributions from academia discussing less-known characteristics of micro-resonators and from industry depicting the challenges of large-scale implementation of resonators are encouraged with the hopes of further stimulating the growth of this field, which is rich with fascinating physics and challenging problems