Force-Guiding Particle Chains for Shape-Shifting Displays

We present design and implementation of a chain of particles that can be programmed to fold the chain into a given curve. The particles guide an external force to fold, therefore the particles are simple and amenable for miniaturization. A chain can consist of a large number of such particles. Using multiple of these chains, a shape-shifting display can be constructed that folds its initially flat surface to approximate a given 3D shape that can be touched and modified by users, for example, enabling architects to interactively view, touch, and modify a 3D model of a building.Comment: 6 pages, 5 figure, submitted to IROS 201

Integrated high-voltage switched-capacitor DC-DC converters

The focus of this work is on the integrated circuit (IC) level integration of high-voltage switched-capacitor (SC) converters with the goal of fully integrated power management solutions for system-on-chip (SoC) and system-in-pagage (SiP) applications. The full integration of SC converters provides a low cost and compact power supply solution for modern electronics. Currently, there are almost no fully integrated SC converters with input voltages above 5 V. The purpose of this work is to provide solutions for higher input voltages. The increasing challenges of a compact and efficient power supply on the chip are addressed. High-voltage rated components and the increased losses caused by parasitics not only reduce power density but also efficiency. Loss mechanisms in high-voltage SC converters are investigated resulting in an optimized model for high-voltage SC converters. The model developed allows an appropriate comparison of different semiconductor technologies and converter topologies. Methods and design proposals for loss reduction are presented. Control of power switches with their supporting circuits is a further challenge for high-voltage SC converters. The aim of this work is to develop fully integrated SC converters with a wide input voltage range. Different topologies and concepts are investigated. The implemented fully integrated SC converter has an input voltage range of 2 V to 13 V. This is twice the range of existing converters. This is achieved by an implemented buck and boost mode as well as 17 conversion ratios. Experimental results show a peak efficiency of 81.5%. This is the highest published peak efficiency for fully integrated SC converters with an input voltage > 5V. With the help of the model developed in this work, a three-phase SC converter topology for input voltages up to 60 V is derived and then investigated and discussed. Another focus of this work is on the power supply of sensor nodes and smart home applications with low-power consumption. Highly integrated micro power supplies that operate directly from mains voltage are particularly suitable for these applications. The micro power supply proposed in this work utilizes the high-voltage SC converter developed. The output power is 14 times higher and the power density eleven times higher than prior work. Since plenty of power switches are built into modern multi-ratio SC converters, the switch control circuits must be optimized with regard to low-power consumption and area requirements. In this work, different level shifter concepts are investigated and a low-power high-voltage level shifter for 50 V applications based on a capacitive level shifter is introduced. The level shifter developed exceeds the state of the art by a factor of more than eleven with a power consumption of 2.1pJ per transition. A propagation delay of 1.45 ns is achieved. The presented high-voltage level shifter is the first level shifter for 50 V applications with a propagation delay below 2 ns and power consumption below 20pJ per transition. Compared to the state of the art, the figure of merit is significantly improved by a factor of two. Furthermore, various charge pump concepts are investigated and evaluated within the context of this work. The charge pump, optimized in this work, improves the state of the art by a factor of 1.6 in terms of efficiency. Bidirectional switches must be implemented at certain locations within the power stage to prevent reverse conduction. The topology of a bidirectional switch developed in this work reduces the dynamic switching losses by 70% and the area consumption including the required charge pumps by up to 65% compared to the state of the art. These improvements make it possible to control the power switches in a fast and efficient way. Index terms — integrated power management, high input voltage, multi-ratio SC converter, level shifter, bidirectional switch, micro power supplyDer Schwerpunkt dieser Arbeit liegt auf der Erforschung von Switched-Capacitor (SC) Spannungswandler für höhere Eingangsspannungen. Ziel der Arbeit ist es Lösungen für ein voll auf dem Halbleiterchip integriertes Power Management anzubieten um System on Chip (SoC) und System in Package (SiP) zu ermöglichen. Die vollständige Integration von SC Spannungswandlern bietet eine kostengünstige und kompakte Spannungsversorgungslösung für moderne Elektronik. Der kontinuierliche Trend hin zu immer kompakterer Elektronik und hin zu höheren Versorgungsspannungen wird in dieser Arbeit adressiert. Aktuell gibt es sehr wenige voll integrierte SC Spannungswandler mit einer Eingangsspannung größer 5 V. Die mit steigender Spannung zunehmenden Herausforderungen an eine kompakte und effiziente Spannungsversorgung auf dem Chip werden in dieser Arbeit untersucht. Die höhere Spannungsfestigkeit der verwendeten Komponenten korreliert mit erhöhten Verlusten und erhöhtem Flächenverbrauch, welche sich negativ auf den Wirkungsgrad und die Leistungsdichte von SC Spannungswandlern auswirkt. Bestandteil dieser Arbeit ist die Untersuchung dieser Verlustmechanismen und die Entwicklung eines Modells, welches speziell für höhere Spannungen optimiert wurde. Das vorgestellte Modell ermöglicht zum einen die optimale Dimensionierung der Spannungswandler und zum anderen faire Vergleichsmöglichkeiten zwischen verschiedenen SC Spannungswandler Architekturen und Halbleitertechnologien. Demnach haben sowohl die gewählte Architektur und Halbleitertechnologie als auch die Kombination aus gewählter Architektur und Technologie erheblichen Einfluss auf die Leistungsfähigkeit der Spannungswandler. Ziel dieser Arbeit ist die Vollintegration eines SC Spannungswandlers mit einem weiten und hohen Eingangsspannungsbereich zu entwickeln. Dazu wurden verschiedene Schaltungsarchitekturen und Konzepte untersucht. Der vorgestellte vollintegrierte SC Spannungswandler weist einen Eingangsspannungsbereich von 2 V bis 13 V auf. Dies ist eine Verdopplung im Vergleich zum Stand der Technik. Dies wird durch einen implementierten Auf- und Abwärtswandler-Betriebsmodus sowie 17 Übersetzungsverhältnisse erreicht. Experimentelle Ergebnisse zeigen einen Spitzenwirkungsgrad von 81.5%. Dies ist der höchste veröffentlichte Spitzenwirkungsgrad für vollintegrierte SC Spannungswandler mit einer Eingangsspannung größer 5 V. Mit Hilfe des in dieser Arbeit entwickelten Modells wird eine dreiphasige SC Spannungswandler Architektur für Eingangsspannungen bis zu 60 V entwickelt und anschließend analysiert und diskutiert. Ein weiterer Schwerpunkt dieser Arbeit adressiert die kompakte Spannungsversorgung von Sensorknoten mit geringem Stromverbrauch, für Anwendungen wie Smart Home und Internet der Dinge (IoT). Für diese Anwendungen eignen sich besonders gut hochintegrierte Mikro-Netzteile, welche direkt mit dem 230VRMS-Hausnetz (bzw. 110VRMS) betrieben werden können. Das in dieser Arbeit vorgestellte Mikro-Netzteil nutzt einen in dieser Arbeit entwickelten SC Spannungswandler für hohe Eingangsspannungen. Die damit erzielte Ausgangsleistung ist 14-mal größer im Vergleich zum Stand der Technik. In SC Spannungswandlern für hohe Spannungen werden viele Leistungsschalter benötigt, deshalb muss bei der Schalteransteuerung besonders auf einen geringen Leistungsverbrauch und Flächenbedarf der benötigten Schaltungsblöcke geachtet werden. Gegenstand dieser Arbeit ist sowohl die Analyse verschiedener Konzepte für Pegelumsetzer, als auch die Entwicklung eines stromsparenden Pegelumsetzers für 50 V-Anwendungen. Mit einer Leistungsaufnahme von 2.1pJ pro Signalübergang reduziert der entwickelte Pegelumsetzer mit kapazitiver Kopplung um mehr als elfmal die Leistungsaufnahme im Vergleich zum Stand der Technik. Die erreichte Laufzeitverzögerung beträgt 1.45 ns. Damit erzielt der vorgestellte Hochspannungs-Pegelumsetzer als erster Pegelumsetzer für 50 V-Anwendungen eine Laufzeitverzögerung unter 2 ns und eine Leistungsaufnahme unter 20pJ pro Signalwechsel. Im Vergleich zum Stand der Technik wird die Leistungskennzahl um den Faktor zwei deutlich verbessert. Darüber hinaus werden im Rahmen dieser Arbeiten verschiedene Ladungspumpenkonzepte untersucht und bewertet. Die in dieser Arbeit optimierte Ladungspumpe verbessert den Stand der Technik um den Faktor 1.6 in Bezug auf den Wirkungsgrad. Die in dieser Arbeit entwickelte Schaltungsarchitektur eines bidirektionalen Schalters reduziert die dynamischen Schaltverluste um 70% und den benötigten Flächenbedarf inklusive der benötigten Ladungspumpe um bis zu 65% gegenüber dem Stand der Technik. Diese Verbesserungen ermöglichen es, die Leistungsschalter schnell und effizient anzusteuern. Schlagworte — Integriertes Powermanagement, hohe Eingangsspannung, Multi-Ratio SC Spannungswan- dler, Pegelumsetzer, bidirektionaler Schalter, Mikro-Netztei

Modular Battery Systems for Electric Vehicles based on Multilevel Inverter Topologies - Opportunities and Challenges

Modular battery systems based on multilevel inverter (MLI) topologies can possibly overcome some shortcomings of two-level inverters when used for vehicle propulsion. The results presented in this thesis aim to point out the advantages and disadvantages, as well as the technical challenges, of modular vehicle battery systems based on MLIs in comparison to a conventional, two-level IGBT inverter drivetrain. The considered key aspects for this comparative investigation are the drive cycle efficiency, the inverter cost, the fault tolerance capability of the drivetrain and the conducted electromagnetic emissions. Extensive experiments have been performed to support the results and conclusions.In this work, it is shown that the simulated drive cycle efficiency of different low-voltage-MOSFET-based, cascaded seven-level inverter types is improved in comparison to a similarly rated, two-level IGBT inverter drivetrain. For example, the simulated WLTP drive cycle efficiency of a cascaded double-H-bridge (CDHB) inverter drivetrain in comparison to a two-level IGBT inverter, when used in a small passenger car, is increased from 94.24% to 95.04%, considering the inverter and the ohmic battery losses. In contrast, the obtained efficiency of a similar rated seven-level cascaded H-bridge (CHB) drivetrain is almost equal to that of the two-level inverter drivetrain, but with the help of a hybrid modulation technique, utilizing fundamental selective harmonic elimination at lower speeds, it could be improved to 94.85%. In addition, the CDHB and CHB inverters’ cost, in comparison to the two-level inverter, is reduced from 342€ to 202€ and 121€, respectively. Furthermore, based on a simple three-level inverter with a dual battery pack, it is shown that MLIs inherently allow for a fault tolerant operation. It is explained how the drivetrain of a neutral point clamped (NPC) inverter can be operated under a fault condition, so that the vehicle can drive with a limited maximum power to the next service station, referred to as limp home mode. Especially, the detection and localization of open circuit faults has been investigated and verified through simulations and experiments.Moreover, it is explained how to measure the conducted emissions of an NPC inverter with a dual battery pack according to the governing standard, CISPR 25, because the additional neutral point connection forms a peculiar three-wire DC source. To separate the measured noise spectra into CM, line-DM and phase-DMquantities, two hardware separators based on HF transformers are developed and utilized. It is shown that the CM noise is dominant. Furthermore, the CM noise is reduced by 3dB to 6dB when operating the inverter with three-level instead of two-level modulation

Fault tolerant electromechanical actuators for aircraft

This thesis reviews the developments in commercial aviation resulting from More Electric Aircraft initiatives. The present level of electromechanical actuation is considered with discussion of the factors affecting more widespread use. Two rather different electromechanical actuators are presented for commercial aircraft; DEAWS electrical flap actuation and ELGEAR nose wheel steering. Both projects are industrially driven with specifications based on existing medium-sized commercial aircraft. Methods comparing fault tolerant electric drive topologies for electrical actuators are presented, showing two different categories of electric drive and comparing each category in a variety of operating conditions to assess size and component count. The safety-driven design process for electromechanical actuators is discussed with reliability calculations presented for both proposed actuators, showing where fault tolerant design is required to meet safety requirements. The selection of an optimum fault tolerant electric drive for each actuator is discussed and fault tolerant control schemes are presented. The development of the electric flap and nose wheel steering systems is described, with the focus on the work performed by the author, primarily on the power electronic converters and control software. A comprehensive range of laboratory and industrial results are given for both actuators, showing demonstrations of fault tolerance at power converter and actuator levels. Following testing, further analysis is given on various issues arising prior and during testing of both converters, with design considerations for future electromechanical actuators. From design testing and analysis, the two projects can be compared to attempt to determine the optimal electromechanical actuator topology and to consider the challenges in evolving the two actuators to aerospace products.EThOS - Electronic Theses Online ServiceEPSRC : DTIGBUnited Kingdo

Area- and Energy- Efficient Modular Circuit Architecture for 1,024-Channel Parallel Neural Recording Microsystem.

This research focuses to develop system architectures and associated electronic circuits for a next generation neuroscience research tool, a massive-parallel neural recording system capable of recording 1,024 channels simultaneously. Three interdependent prototypes have been developed to address major challenges in realization of the massive-parallel neural recording microsystems: minimization of energy and area consumption while preserving high quality in recordings. First, a modular 128-channel Δ-ΔΣ AFE using the spectrum shaping has been designed and fabricated to propose an area-and energy efficient solution for neural recording AFEs. The AFE achieved 4.84 fJ/C−s·mm2 figure of merit that is the smallest the area-energy product among the state-of-the-art multichannel neural recording systems. It also features power and area consumption of 3.05 µW and 0.05 mm2 per channel, respectively while exhibiting 63.3 dB signal-to-noise ratio with 3.02 µVrms input referred noise. Second, an on-chip mixed signal neural signal compressor was built to reduce the energy consumption in handling and transmission of the recorded data since this occupies a large portion of the total energy consumption as the number of parallel recording increases. The compressor reduces the data rates of two distinct groups of neural signals that are essential for neuroscience research: LFP and AP without loss of informative signals. As a result, the power consumptions for the data handling and transmissions of the LFP and AP were reduced to about 1/5.35 and 1/10.54 of the uncompressed cases, respectively. In the total data handling and transmission, the measured power consumption per channel is 11.98 µW that is about 1/9 of 107.5 µW without the compression. Third, a compact on-chip dc-to-dc converter with constant 1 MHz switching frequency has been developed to provide reliable power supplies and enhance energy delivery efficiency to the massive-parallel neural recording systems. The dc-to-dc converter has only predictable tones at the output and it exhibits > 80% power conversion efficiency at ultra-light loads, < 100 µW that is relevant power most of the multi-channel neural recording systems consume. The dc-to-dc converter occupies 0.375 mm2 of area which is less than 1/20 of the area the first prototype consumes (8.64 mm2).PhDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/133244/1/sungyun_1.pd

Power Converter of Electric Machines, Renewable Energy Systems, and Transportation

Power converters and electric machines represent essential components in all fields of electrical engineering. In fact, we are heading towards a future where energy will be more and more electrical: electrical vehicles, electrical motors, renewables, storage systems are now widespread. The ongoing energy transition poses new challenges for interfacing and integrating different power systems. The constraints of space, weight, reliability, performance, and autonomy for the electric system have increased the attention of scientific research in order to find more and more appropriate technological solutions. In this context, power converters and electric machines assume a key role in enabling higher performance of electrical power conversion. Consequently, the design and control of power converters and electric machines shall be developed accordingly to the requirements of the specific application, thus leading to more specialized solutions, with the aim of enhancing the reliability, fault tolerance, and flexibility of the next generation power systems

Design and Control of Power Converters for High Power-Quality Interface with Utility and Aviation Grids

Power electronics as a subject integrating power devices, electric and electronic circuits, control, and thermal and mechanic design, requires not only knowledge and engineering insight for each subarea, but also understanding of interface issues when incorporating these different areas into high performance converter design.Addressing these fundamental questions, the dissertation studies design and control issues in three types of power converters applied in low-frequency high-power transmission, medium-frequency converter emulated grid, and high-frequency high-density aviation grid, respectively, with the focus on discovering, understanding, and mitigating interface issues to improve power quality and converter performance, and to reduce the noise emission.For hybrid ac/dc power transmission,• Analyze the interface transformer saturation issue between ac and dc power flow under line unbalances.• Proposed both passive transformer design and active hybrid-line-impedance-conditioner to suppress this issue.For transmission line emulator,• Propose general transmission line emulation schemes with extension capability.• Analyze and actively suppress the effects of sensing/sampling bias and PWM ripple on emulation considering interfaced grid impedance.• Analyze the stability issue caused by interaction of the emulator and its interfaced impedance. A criterion that determines the stability and impedance boundary of the emulator is proposed.For aircraft battery charger,• Investigate architectures for dual-input and dual-output battery charger, and a three-level integrated topology using GaN devices is proposed to achieve high density.• Identify and analyze the mechanisms and impacts of high switching frequency, di/dt, dv/dt on sensing and power quality control; mitigate solutions are proposed.• Model and compensate the distortion due to charging transition of device junction capacitances in three-level converters.• Find the previously overlooked device junction capacitance of the nonactive devices in three-level converters, and analyze the impacts on switching loss, device stress, and current distortion. A loss calculation method is proposed using the data from the conventional double pulse tester.• Establish fundamental knowledge on performance degradation of EMI filters. The impacts and mechanisms of both inductive and capacitive coupling on different filter structures are understood. Characterization methodology including measuring, modeling, and prediction of filter insertion loss is proposed. Mitigation solutions are proposed to reduce inter-component coupling and self-parasitics

Inductive interconnecting solutions for airworthiness standards and power-quality requirements compliance for more-electric aircraft/engine power networks

Driven by efficiency benefits, performance optimization and reduced fuel-burn, the aviation industry has witnessed a technological shift towards the broader electrification of on-board systems, known as the More-Electric Aircraft (MEA) concept. Electrical systems are now responsible for functions that previously required mechanical, hydraulic or pneumatic power sources, with a subset of these functions being critical or essential to the continuity and safety of the flight.;This trend of incremental electrification has brought along benefits such as reductions in weight and volume, performance optimization and reduced life-cycle costs for the aircraft operator. It has however also increased the necessary engine power offtake and has made the electrical networks of modern MEA larger and more complex. In pursuit of new, more efficient electrical architectures, paralleled or interconnected generation is thought to be one platform towards improved performance and fuel savings.;However, the paralleling of multiple generation sources across the aircraft can breach current design and certification rules under fault conditions. This thesis proposes and evaluates candidate interconnecting solutions to minimize the propagation of transients across the interconnected network and demonstrates their effectiveness with reference to current airworthiness standards and MIL-STD-704F power quality requirements.;It demonstrates that inductive interconnections may achieve compliance with these requirements and quantifies the estimated mass penalty incurred on the electrical architecture, highlighting how architectural and operating strategies can influence design options at a systems level. By examining the impact of protection operation speed on the electrical network, it determines that fast fault protection is a key enabling technology towards implementing lightweight and compliant interconnected architectures.;Lastly, this thesis addresses potential implications arising from alternate standards interpretations within the framework of interconnected networks and demonstrates the impact of regulatory changes on the electrical architecture and interconnecting solutions.Driven by efficiency benefits, performance optimization and reduced fuel-burn, the aviation industry has witnessed a technological shift towards the broader electrification of on-board systems, known as the More-Electric Aircraft (MEA) concept. Electrical systems are now responsible for functions that previously required mechanical, hydraulic or pneumatic power sources, with a subset of these functions being critical or essential to the continuity and safety of the flight.;This trend of incremental electrification has brought along benefits such as reductions in weight and volume, performance optimization and reduced life-cycle costs for the aircraft operator. It has however also increased the necessary engine power offtake and has made the electrical networks of modern MEA larger and more complex. In pursuit of new, more efficient electrical architectures, paralleled or interconnected generation is thought to be one platform towards improved performance and fuel savings.;However, the paralleling of multiple generation sources across the aircraft can breach current design and certification rules under fault conditions. This thesis proposes and evaluates candidate interconnecting solutions to minimize the propagation of transients across the interconnected network and demonstrates their effectiveness with reference to current airworthiness standards and MIL-STD-704F power quality requirements.;It demonstrates that inductive interconnections may achieve compliance with these requirements and quantifies the estimated mass penalty incurred on the electrical architecture, highlighting how architectural and operating strategies can influence design options at a systems level. By examining the impact of protection operation speed on the electrical network, it determines that fast fault protection is a key enabling technology towards implementing lightweight and compliant interconnected architectures.;Lastly, this thesis addresses potential implications arising from alternate standards interpretations within the framework of interconnected networks and demonstrates the impact of regulatory changes on the electrical architecture and interconnecting solutions

Power quality improvement utilizing photovoltaic generation connected to a weak grid

Microgrid research and development in the past decades have been one of the most popular topics. Similarly, the photovoltaic generation has been surging among renewable generation in the past few years, thanks to the availability, affordability, technology maturity of the PV panels and the PV inverter in the general market. Unfortunately, quite often, the PV installations are connected to weak grids and may have been considered as the culprit of poor power quality affecting other loads in particular sensitive loads connected to the same point of common coupling (PCC). This paper is intended to demystify the renewable generation, and turns the negative perception into positive revelation of the superiority of PV generation to the power quality improvement in a microgrid system. The main objective of this work is to develop a control method for the PV inverter so that the power quality at the PCC will be improved under various disturbances. The method is to control the reactive current based on utilizing the grid current to counteract the negative impact of the disturbances. The proposed control method is verified in PSIM platform. Promising results have been obtaine