17 research outputs found

    Characterisation of MIMO radio propagation channels

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    Due to the incessant requirement for higher performance radio systems, wireless designers have been constantly seeking ways to improve spectrum efficiency, link reliability, service quality, and radio network coverage. During the past few years, space-time technology which employs multiple antennas along with suitable signalling schemes and receiver architectures has been seen as a powerful tool for the implementation of the aforementioned requirements. In particular, the concept of communications via Multiple-Input Multiple-Output (MIMO) links has emerged as one of the major contending ideas for next generation ad-hoc and cellular systems. This is inherently due to the capacities expected when multiple antennas are employed at both ends of the radio link. Such a mobile radio propagation channel constitutes a MIMO system. Multiple antenna technologies and in particular MIMO signalling are envisaged for a number of standards such as the next generation of Wireless Local Area Network (WLAN) technology known as 802.1 ln and the development of the Worldwide Interoperability for Microwave Access (WiMAX) project, such as the 802.16e. For the efficient design, performance evaluation and deployment of such multiple antenna (space-time) systems, it becomes increasingly important to understand the characteristics of the spatial radio channel. This criterion has led to the development of new sounding systems, which can measure both spatial and temporal channel information. In this thesis, a novel semi-sequential wideband MIMO sounder is presented, which is suitable for high-resolution radio channel measurements. The sounder produces a frequency modulated continuous wave (FMCW) or chirp signal with variable bandwidth, centre frequency and waveform repetition rate. It has programmable bandwidth up to 300 MHz and waveform repetition rates up to 300 Hz, and could be used to measure conventional high- resolution delay/Doppler information as well as spatial channel information such as Direction of Arrival (DOA) and Direction of Departure (DOD). Notably the knowledge of the angular information at the link ends could be used to properly design and develop systems such as smart antennas. This thesis examines the theory of multiple antenna propagation channels, the sounding architecture required for the measurement of such spatial channel information and the signal processing which is used to quantify and analyse such measurement data. Over 700 measurement files were collected corresponding to over 175,000 impulse responses with different sounder and antenna array configurations. These included measurements in the Universal Mobile Telecommunication Systems Frequency Division Duplex (UMTS-FDD) uplink band, the 2.25 GHz and 5.8 GHz bands allocated for studio broadcast MIMO video links, and the 2.4 GHz and 5.8 GHz ISM bands allocated for Wireless Local Area Network (WLAN) activity as well as for a wide range of future systems defined in the WiMAX project. The measurements were collected predominantly for indoor and some outdoor multiple antenna channels using sounding signals with 60 MHz, 96 MHz and 240 MHz bandwidth. A wide range of different MIMO antenna array configurations are examined in this thesis with varying space, time and frequency resolutions. Measurements can be generally subdivided into three main categories, namely measurements at different locations in the environment (static), measurements while moving at regular intervals step by step (spatial), and measurements while the receiver (or transmitter) is on the move (dynamic). High-scattering as well as time-varying MIMO channels are examined for different antenna array structures

    DESIGN AND CHARACTERIZATION OF LOW-POWER LOW-NOISE ALLDIGITAL SERIAL LINK FOR POINT-TO-POINT COMMUNICATION IN SOC

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    The fully-digital implementation of serial links has recently emerged as a viable alternative to their classical analogue counterpart. Indeed, reducing the analogue content in favour of expanding the digital content becomes more attractive due to the ability to achieve less power consumption, less sensitivity to the noise and better scalability across multiple technologies and platforms with inconsiderable modifications. In addition, describing the circuit in hardware description languages gives it a high flexibility to program all design parameters in a very short time compared with the analogue designs which need to be re-designed at transistor level for any parameter change. This can radically reduce cost and time-to-market by saving a significant amount of development time. However, beside these considerable advantages, the fully-digital architecture poses several design challenges

    Wide-band channel sounding in the bands above 2GHz

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    Modem telecommunication services require increasing data rates for both mobile and fixed applications. At frequencies in the range 2.5 GHz to 6 GHz physical constraints on the size of equipment result in antenna with moderate directivity typically with an antenna beam width of 20 degrees or greater. Thus building and ground clutter is present within the first Fresnel zones of the antenna system which gives rise to multi-path propagation. This multi-path propagation (average delay and RMS delay spread) has been investigated using a wideband FMCW channel sounder that is capable of operation at a number of frequencies. The channel sounder has been based upon a parallel architecture sounder operating within the 2 GHz band with a number of frequency conversion modules to translate operation to the new frequency bands under study. Two primary configurations have been explored. In the first of these, propagation has been measured simultaneously within the 2.5 GHz, 3.4 GHz and 5.7 GHz bands. This is believed to be novel and original. In the second configuration four parallel channels operating within the 5.7 GHz band may be operated simultaneously. This configuration supports multiple antennas at the receiver. To support the work in the bands from 2.5 GHz to 6 GHz wideband discone antenna have been designed and fabricated. A system to provide relative gain and phase calibration for up to four antennas has been developed and demonstrated. This is also believed to represent a novel method of performing antenna and array calibration. Finally, the frequency converters have been used in conjunction with additional components to provide an FMCพ sounder operating within the 60 GHz Oxygen absorption band. This work is novel in that up to 1 GHz of spectrum can be swept. To support this work a significant number of microwave components have been designed and developed. In particular a novel wide band balanced X3 multiplier and a novel impedance-matched amplitude-equaliser (to provide amplifier gain-slope equalisation) has been developed. Channel soundings have been performed at three frequencies simultaneously using band specific and common antenna. The average delay and RMS delay spread have been demonstrated to be essentially frequency independent for the environments evaluated

    Residue Number Systems: a Survey

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    A time-based approach for multi-GHz embedded mixed-signal characterization and measurement /

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    The increasingly more sophisticated systems that are nowadays implemented on a single chip are placing stringent requirements on the test industry. New test strategies, equipment, and methodologies need to be developed to sustain the constant increase in demand for consumer and communication electronics. Techniques for built-in-self-test (BIST) and design-for-test (DFT) strategies have been proven to offer more feasible and economical testing solutions.Previous works have been conducted to perform on-chip testing, characterization, and measurement of signals and components. The current thesis advances those techniques on many levels. In terms of performance, an increase of more than an order of magnitude in speed is achieved. 70-GHz (effective sampling) on-chip oscilloscope is reported, compared to 4-GHz and 10-GHz ones in previous state-of-the-art implementations. Power dissipation is another area where the proposed work offer a superior solution compared to previous alternatives. All the proposed circuits do not exceed a few milliWatts of power dissipation, while performing multi-GHz high-speed signal capture at a medium resolution. Finally, and possibly most importantly, all the proposed circuits for test rely on a different form of signal processing; the time-based approach. It is believed that this approach paves the path to a lot of new techniques and circuit design skills that can be investigated more deeply. As an integral part of the time-based processing approach for GHz signal capture, this thesis verifies the advantages of using time amplification. The use of such amplification in the time domain is materialized with experimental results from three specific integrated circuits achieving different tasks in GHz high-speed in-situ signal measurement and characterization. Advantages of using such time-based approach techniques, when combined with the use of a front-end time amplifier, include noise immunity, the use of synthesizable digital cells, and circuit building blocks that track the technology scaling in terms of area and speed

    The Fifth NASA Symposium on VLSI Design

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    The fifth annual NASA Symposium on VLSI Design had 13 sessions including Radiation Effects, Architectures, Mixed Signal, Design Techniques, Fault Testing, Synthesis, Signal Processing, and other Featured Presentations. The symposium provides insights into developments in VLSI and digital systems which can be used to increase data systems performance. The presentations share insights into next generation advances that will serve as a basis for future VLSI design

    A computing structure for data acquisition in high energy physics

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    A review of the development of parallel computing ispresented, followed by a summary of currently recognised typesof parallel computer and a brief summary of some applicationsof parallel computing in the field of high energy physics.The computing requirement at the data acquisition stageof a particular set of high energy physics experiments isdetailed, with reference to the computing system currently inuse. The requirement for a parallel processor to process thedata from these experiments is established and a possiblecomputing structure put forward.The topology proposed consists of a set of rings ofprocessors stacked to give a cylindrical arrangement, ananalytical approach is used to verify the suitability andextensibility of the suggested scheme. Using simulationresults the behaviour of rings and cylinders of processorsusing different algorithms for the movement of data within thesystem and different patterns of data input is presented anddiscussed.Practical hardware and software details for processingequipment capable of supporting such a structure as presentedhere is given, various algorithms for use with this equipment,e. g. program distribution, are developed and the software forthe implementation of the cylindrical structure is presented.Appendices of constructional information and all programlistings are included

    Direct digital synthesizers : theory, design and applications

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    Traditional designs of high bandwidth frequency synthesizers employ the use of a phase-locked-loop (PLL). A direct digital synthesizer (DDS) provides many significant advantages over the PLL approaches. Fast settling time, sub-Hertz frequency resolution, continuous-phase switching response and low phase noise are features easily obtainable in the DDS systems. Although the principle of the DDS has been known for many years, the DDS did not play a dominant role in wideband frequency generation until recent years. Earlier DDSs were limited to produce narrow bands of closely spaced frequencies, due to limitations of digital logic and D/A-converter technologies. Recent advantages in integrated circuit (IC) technologies have brought about remarkable progress in this area. By programming the DDS, adaptive channel bandwidths, modulation formats, frequency hopping and data rates are easily achieved. This is an important step towards a "software-radio" which can be used in various systems. The DDS could be applied in the modulator or demodulator in the communication systems. The applications of DDS are restricted to the modulator in the base station. The aim of this research was to find an optimal front-end for a transmitter by focusing on the circuit implementations of the DDS, but the research also includes the interface to baseband circuitry and system level design aspects of digital communication systems. The theoretical analysis gives an overview of the functioning of DDS, especially with respect to noise and spurs. Different spur reduction techniques are studied in detail. Four ICs, which were the circuit implementations of the DDS, were designed. One programmable logic device implementation of the CORDIC based quadrature amplitude modulation (QAM) modulator was designed with a separate D/A converter IC. For the realization of these designs some new building blocks, e.g. a new tunable error feedback structure and a novel and more cost-effective digital power ramp generator, were developed.reviewe

    Hybrid DDS-PLL based reconfigurable oscillators with high spectral purity for cognitive radio

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    Analytical, design and simulation studies on the performance optimization of reconfigurable architecture of a Hybrid DDS – PLL are presented in this thesis. The original contributions of this thesis are aimed towards the DDS, the dithering (spur suppression) scheme and the PLL. A new design of Taylor series-based DDS that reduces the dynamic power and number of multipliers is a significant contribution of this thesis. This thesis compares dynamic power and SFDR achieved in the design of varieties of DDS such as Quartic, Cubic, Linear and LHSC. This thesis proposes two novel schemes namely “Hartley Image Suppression” and “Adaptive Sinusoidal Interference Cancellation” overcoming the low noise floor of traditional dithering schemes. The simulation studies on a Taylor series-based DDS reveal an improvement in SFDR from 74 dB to 114 dB by using Least Mean Squares -Sinusoidal Interference Canceller (LM-SIC) with the noise floor maintained at -200 dB. Analytical formulations have been developed for a second order PLL to relate the phase noise to settling time and Phase Margin (PM) as well as to relate jitter variance and PM. New expressions relating phase noise to PM and lock time to PM are derived. This thesis derives the analytical relationship between the roots of the characteristic equation of a third order PLL and its performance metrics like PM, Gardner’s stability factor, jitter variance, spur gain and ratio of noise power to carrier power. This thesis presents an analysis to relate spur gain and capacitance ratio of a third order PLL. This thesis presents an analytical relationship between the lock time and the roots of its characteristic equation of a third order PLL. Through Vieta’s circle and Vieta’s angle, the performance metrics of a third order PLL are related to the real roots of its characteristic equation
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